Abstract: Various embodiments of the invention relate to continuously verifying semiconductor device state integrity. A counter is combined to form part of the Cyclic Redundancy Check (CRC) calculation for control register within the semiconductor device. The counter is initialized to zero and resets after a predetermined number of cycles. The counter value is added to the currently calculated CRC value to get a combined CRC value. Every time a CRC value is calculated for the register bank, the counter value is updated, e.g. incremented. If the CRC calculation is repeated enough times, the counter value will reach its maximum value, and then roll over to its initial value of zero. If no errors occur in the register bank, the combined CRC value at the rolling over point will match an initial combined CRC value. Such a repetitive pattern of the combined CRC value may be used to continuously monitor control register integrity.

Abstract: Various embodiments of the invention relate to continuously verifying semiconductor device state integrity. A counter is combined to form part of the Cyclic Redundancy Check (CRC) calculation for control register within the semiconductor device. The counter is initialized to zero and resets after a predetermined number of cycles. The counter value is added to the currently calculated CRC value to get a combined CRC value. Every time a CRC value is calculated for the register bank, the counter value is updated, e.g. incremented. If the CRC calculation is repeated enough times, the counter value will reach its maximum value, and then roll over to its initial value of zero. If no errors occur in the register bank, the combined CRC value at the rolling over point will match an initial combined CRC value. Such a repetitive pattern of the combined CRC value may be used to continuously monitor control register integrity.