Abstract: Doped, low-temperature co-fired ceramic (LTCC) insulating substrates and related wiring boards and methods of manufacture are disclosed. The doped, LTCC insulating substrate is formed from a baked (e.g., sintered) glass-ceramic aggregate material formed from a glass material, a ceramic filler material, and a composite oxide. The crystallized glass-ceramic aggregate is then doped with Iron and/or Manganese before baking. Iron or Manganese can further reduce dielectric loss and the loss tangent of the LTCC insulating substrate formed from that glass material. The glass material becomes crystallized due to an oxide crystal phase being deposited on the glass material during baking, which reduces the dielectric losses. This may be important for the application use as wiring boards for high radio-frequency (RF) electrical circuits where low dielectric loss and loss tangent is desired to achieve a desired signal transmission delay performance.

Abstract: Doped, low-temperature co-fired ceramic (LTCC) insulating substrates and related wiring boards and methods of manufacture are disclosed. The doped, LTCC insulating substrate is formed from a baked (e.g., sintered) glass-ceramic aggregate material formed from a glass material, a ceramic filler material, and a composite oxide. The crystallized glass-ceramic aggregate is then doped with Iron and/or Manganese before baking. Iron or Manganese can further reduce dielectric loss and the loss tangent of the LTCC insulating substrate formed from that glass material. The glass material becomes crystallized due to an oxide crystal phase being deposited on the glass material during baking, which reduces the dielectric losses. This may be important for the application use as wiring boards for high radio-frequency (RF) electrical circuits where low dielectric loss and loss tangent is desired to achieve a desired signal transmission delay performance.

Abstract: A ceramic multilayer component has a base body with connecting contacts, fitted to it, with a ferrite ceramic, which is provided for an inductive area and in which an inductance is arranged which is formed by electrical conductors, and with a varistor ceramic, wherein the varistor ceramic comprises at most 40% of the volume of the base body.

Abstract: A multi-layered component is disclosed, including at least one inductive region, wherein the inductive region includes a ferrite ceramic. The inductive region has electrode structures that form at least one inductance. The multi-layered component has at least one capacitive region, wherein at least one capacitive region includes a varistor ceramic. The capacitive region forms at least one capacitance. At least one inductive region and at least one capacitive region form at least one LC filter.

Abstract: The multilayer component has a base body (10) with connecting contacts (1a, 1b), fitted to it, with a ferrite ceramic (2), which is provided for an inductive area and in which an inductance (12) is arranged which is formed by electrical conductors, and with a varistor ceramic (4), wherein the varistor ceramic (4) comprises at most 40% of the volume of the base body (10).

Abstract: A multi-layered component is disclosed, including at least one inductive region, wherein the inductive region includes a ferrite ceramic. The inductive region has electrode structures that form at least one inductance. The multi-layered component has at least one capacitive region, wherein at least one capacitive region includes a varistor ceramic. The capacitive region forms at least one capacitance. At least one inductive region and at least one capacitive region form at least one LC filter.