Abstract: The present disclosure relates to a commutation cell and to a compensation circuit for limiting overvoltage across the power electronic switch of the commutation cell and for limiting a recovery current in a freewheel diode of the commutation cell. The power electronic switch has a parasitic emitter inductance. A variable gain compensation circuit generates a feedback from a voltage generated across the parasitic inductance of the emitter of the power switch at turn-on or turn-off of the power electronic switch. The compensation circuit provides the feedback to a control of the power electronic switch to reduce the voltage generated on the parasitic emitter inductance. A power converter including the commutation cell with the compensation circuit is also disclosed.

Abstract: The present disclosure relates to a power converter configured for limiting switching overvoltage. The power converter comprises a bottom commutation cell that includes a bottom power electronic switch and a bottom compensation circuit connected to a bottom parasitic inductance. The bottom compensation circuit applies a sample of the voltage induced across the bottom parasitic inductance at turn-off of the bottom power electronic switch to the reference node of the bottom gate driver. The power converter also comprises a top commutation cell that includes top power electronic switch and a top compensation circuit connected to the bottom parasitic inductance. The top compensation circuit applies a sample of the voltage induced across the bottom parasitic emitter upon turn-off of the top power electronic switch to the reference node of the top gate driver.

Abstract: A physical topology for receiving top and bottom power electronic switches comprises a top collector trace connected to a positive voltage power supply tab and having a connection area for a collector of a top power electronic switch, a bottom emitter trace connected to a negative voltage power supply tab and having a connection area for an emitter of the bottom power electronic switch, and a middle trace connected to a load tab and having a connection area for an emitter of the top power electronic switch and a connection area for a collector of the bottom power electronic switch. Sampling points are provided on the traces for voltages on the emitters of the top and bottom power electronic switches, on the trace for voltage of the collector of the bottom power electronic switch, and on the negative voltage power supply tab. The topology defines parasitic inductances.

Abstract: A turn-off overvoltage limiting for IGBT is described herein. The injection of a sample of the overvoltage across the IGBT in the gate drive to slow down the slope of the gate voltage decrease only during the overvoltage above a predetermined value is described herein. Techniques to increase the parasitic inductance to allow the control to limit an overvoltage at turn off of the second IGBT are also described herein.

Abstract: The present disclosure relates to a power converter configured for limiting switching overvoltage. The power converter comprises a bottom commutation cell that includes a bottom power electronic switch and a bottom compensation circuit connected to a bottom parasitic inductance. The bottom compensation circuit applies a sample of the voltage induced across the bottom parasitic inductance at turn-off of the bottom power electronic switch to the reference node of the bottom gate driver. The power converter also comprises a top commutation cell that includes top power electronic switch and a top compensation circuit connected to the bottom parasitic inductance. The top compensation circuit applies a sample of the voltage induced across the bottom parasitic emitter upon turn-off of the top power electronic switch to the reference node of the top gate driver.

Abstract: A physical topology for receiving top and bottom power electronic switches comprises a top collector trace connected to a positive voltage power supply tab and having a connection area for a collector of a top power electronic switch, a bottom emitter trace connected to a negative voltage power supply tab and having a connection area for an emitter of the bottom power electronic switch, and a middle trace connected to a load tab and having a connection area for an emitter of the top power electronic switch and a connection area for a collector of the bottom power electronic switch. Sampling points are provided on the traces for voltages on the emitters of the top and bottom power electronic switches, on the trace for voltage of the collector of the bottom power electronic switch, and on the negative voltage power supply tab. The topology defines parasitic inductances. Sample voltages can be supplied to gate driver references.

Abstract: The present topology for controlled power switch module is concerned with a module where the parasitic inductance of the emitter of the top power switch is optimized to allow the injection of a sample of the overvoltage across this parasitic inductance in the gate drive circuit of the top power switch as a feedback to slow down the slope of the falling gate voltage during an overvoltage that is above a predetermined value.

Abstract: The present disclosure relates to a compensation circuit for independently controlling turn-on and turn-off of a power electronic switch through a gate driver. The compensation circuit includes a circuit path sampling a first portion of a voltage induced across an inductance of the power electronic switch at turn-on. Another circuit path samples a second portion of the voltage induced across the inductance of the power electronic switch at turn-off. The compensation circuit further includes a gate driver reference connection configured to respectively supply the sampled portions of the voltage during turn-on and turn-off of the power electronic switch. A compensation circuit controlling a first power electronic switch in parallel with a second power electronic switch, a commutation cell and a power converter having a pair of parallel legs, in which each power electronic switch is provided with the compensation circuit, are also disclosed.

Abstract: A turn-off overvoltage limiting for IGBT is described herein. The injection of a sample of the overvoltage across the IGBT in the gate drive to slow down the slope of the gate voltage decrease only during the overvoltage above a predetermined value is described herein. Techniques to increase the parasitic inductance to allow the control to limit an overvoltage at turn off of the second IGBT are also described herein.

Abstract: A turn-off overvoltage limiting for IGBT is described herein. The injection of a sample of the overvoltage across the IGBT in the gate drive to slow down the slope of the gate voltage decrease only during the overvoltage above a predetermined value is described herein. Techniques to increase the parasitic inductance to allow the control to limit an overvoltage at turn off of the second IGBT are also described herein.

Abstract: A spelling system derives a language model for a particular domain of structured data, the language model enabling determinations of alternative spellings of queries or other strings of text from that domain. More specifically, the spelling system calculates (a) probabilities that the various query entity types—such as STREET, CITY, or STATE for queries in the geographical domain—are arranged in each of the various possible orders, and (b) probabilities that an arbitrary query references given particular ones of the entities, such as the street “El Camino Real.” Based on the calculated probabilities, the spelling system generates a language model that has associated scores (e.g., probabilities) for each of a set of probable entity name orderings, where the total number of entity name orderings is substantially less than the number of all possible orderings.

Abstract: The present disclosure relates to a compensation circuit for independently controlling turn-on and turn-off of a power electronic switch through a gate driver. The compensation circuit includes a circuit path sampling a first portion of a voltage induced across an inductance of the power electronic switch at turn-on. Another circuit path samples a second portion of the voltage induced across the inductance of the power electronic switch at turn-off. The compensation circuit further includes a gate driver reference connection configured to respectively supply the sampled portions of the voltage during turn-on and turn-off of the power electronic switch. A compensation circuit controlling a first power electronic switch in parallel with a second power electronic switch, a commutation cell and a power converter having a pair of parallel legs, in which each power electronic switch is provided with the compensation circuit, are also disclosed.

Abstract: The present disclosure relates to a commutation cell and to a compensation circuit for limiting overvoltage across the power electronic switch of the commutation cell and for limiting a recovery current in a freewheel diode of the commutation cell. The power electronic switch has a parasitic emitter inductance. A variable gain compensation circuit generates a feedback from a voltage generated across the parasitic inductance of the emitter of the power switch at turn-on or turn-off of the power electronic switch. The compensation circuit provides the feedback to a control of the power electronic switch to reduce the voltage generated on the parasitic emitter inductance. A power converter including the commutation cell with the compensation circuit is also disclosed.

Abstract: The present topology for controlled power switch module is concerned with a module where the parasitic inductance of the emitter of the top power switch is optimized to allow the injection of a sample of the overvoltage across this parasitic inductance in the gate drive circuit of the top power switch as a feedback to slow down the slope of the falling gate voltage during an overvoltage that is above a predetermined value.

Abstract: A location system and method receives a location to be displayed on a diagrammatic map, determines the relative position of the location to nearby map features on the diagrammatic map and using that relative position, displays the location on the diagrammatic map.

Abstract: A turn-off overvoltage limiting for IGBT is described herein. The injection of a sample of the overvoltage across the IGBT in the gate drive to slow down the slope of the gate voltage decrease only during the overvoltage above a predetermined value is described herein. Techniques to increase the parasitic inductance to allow the control to limit an overvoltage at turn off of the second IGBT are also described herein.

Abstract: A spelling system derives a language model for a particular domain of structured data, the language model enabling determinations of alternative spellings of queries or other strings of text from that domain. More specifically, the spelling system calculates (a) probabilities that the various query entity types—such as STREET, CITY, or STATE for queries in the geographical domain—are arranged in each of the various possible orders, and (b) probabilities that an arbitrary query references given particular ones of the entities, such as the street “El Camino Real.” Based on the calculated probabilities, the spelling system generates a language model that has associated scores (e.g., probabilities) for each of a set of probable entity name orderings, where the total number of entity name orderings is substantially less than the number of all possible orderings.