Patents by Inventor Pascal Gardes

Pascal Gardes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110114786
    Abstract: An aircraft engine attachment device including a rigid structure and a mechanism attaching the engine on the rigid structure, the attachment mechanism including a rear engine attachment and a device for taking-up thrust forces generated by the engine. The rear engine attachment is attached to the rigid structure by two lateral fittings attached to the rigid structure. The force take-up device includes two connecting rods mechanically connected to a spreader beam by a mechanical connection, a connection fitting attached to the rear engine attachment and mechanically connected to the rigid structure by a thrust pin, the lateral fittings including a stop mechanism to limit pivoting of the spreader beam if a connecting rod breaks and ensuring transmission of thrust forces to the rigid structure.
    Type: Application
    Filed: August 22, 2008
    Publication date: May 19, 2011
    Applicant: AIRBUS OPERATIONS (inc. as a SOC. Par Act. Simpl. )
    Inventors: Emmanuel Guillet, Jean-Marc Martinou, Pascal Gardes
  • Publication number: 20100090056
    Abstract: An aircraft assembly including a wing element and an attachment pylori of a turboengine, including a rigid structure forming a caisson defined externally by a first longeron, a second longeron, and two lateral panels. The assembly also includes an attachment mechanism of the structure on the wing element, fitted with two front attachments, each including two first fittings solid with the associated lateral panel. For each front attachment, the two first fittings are arranged respectively on either side of their associated lateral panel.
    Type: Application
    Filed: April 22, 2008
    Publication date: April 15, 2010
    Applicant: AIRBUS OPERATIONS
    Inventors: Pascal Gardes, Stephane Combes
  • Patent number: 7591958
    Abstract: The manufacturing of electronic components on individual substrates made of an insulating material includes molding, in a silicon wafer, an insulating material with a thickness corresponding to the final thickness desired for the substrates, manufacturing the electronic components, and removing the silicon from the rear surface of the wafer after manufacturing of the components.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: September 22, 2009
    Assignee: STMicroelectronics SA
    Inventors: Pascal Gardes, Fabrice Guitton
  • Patent number: 7404249
    Abstract: A method for manufacturing an inductance in a monolithic circuit including a substrate of planar upper surface, including the steps of forming in the substrate a cavity substantially following the contour of the inductance to be formed, the cross-section of the cavity being deep with respect to its width; and filling the cavity with a conductive material.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: July 29, 2008
    Assignee: STMicroelectronics S.A.
    Inventors: Pascal Gardes, Gérard Auriel
  • Publication number: 20080156930
    Abstract: An aircraft engine attachment configured to be inserted between an engine and an EMS, the attachment including a clevis connected to a first fixing device including an end fitting with two arms and a pin passing through the clevis and the two arms, in each of which an orifice is formed including a first ring and a second ring respectively holding the pin. The first ring includes a bottom acting as a stop for a first end of the pin, and the first attachment device includes a mechanism to stop the pin in translation cooperating with a second end of the pin.
    Type: Application
    Filed: June 27, 2006
    Publication date: July 3, 2008
    Applicant: Airbus France
    Inventors: Virginie Audart-Noel, Pascal Gardes
  • Publication number: 20060057782
    Abstract: The manufacturing of electronic components on individual substrates made of an insulating material includes molding, in a silicon wafer, an insulating material with a thickness corresponding to the final thickness desired for the substrates, manufacturing the electronic components, and removing the silicon from the rear surface of the wafer after manufacturing of the components.
    Type: Application
    Filed: August 26, 2005
    Publication date: March 16, 2006
    Inventors: Pascal Gardes, Fabrice Guitton
  • Patent number: 6884726
    Abstract: A method for handling a thin silicon wafer including the steps of successively forming on a surface of the wafer a first protection layer, a first etch stop layer, and an external layer; forming on a surface of a support wafer a gluing layer of the same material as the external layer of the wafer, the surface of the support wafer including a plurality of pads, the respective upper portions of which are substantially planar and coplanar; fastening, by direct gluing, the external layer of the wafer and the gluing layer of the support wafer; processing the wafer to form circuits therein; depositing a second protection layer on the wafer surface which is not glued to the support wafer; and removing by an etch process the material forming the external layer of the wafer and the gluing layer of the support wafer.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: April 26, 2005
    Assignee: STMicroelectronics S.A.
    Inventor: Pascal Gardes
  • Patent number: 6830970
    Abstract: A method for manufacturing, in a monolithic circuit including a substrate, an inductance and a through via, including the step of forming, from a first surface of the substrate, at least one trench according to the contour of the inductance to be formed; forming by laser in the substrate a through hole at the location desired for the via; simultaneously insulating the surface of the trench and of the hole; and depositing a conductive material in the trench and at least on the hole walls.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: December 14, 2004
    Assignee: STMicroelectronics, S.A.
    Inventor: Pascal Gardes
  • Patent number: 6677657
    Abstract: A method for forming a component in a portion of a semiconductor substrate on insulator delimited by a lateral wall separated by an insulating layer from a peripheral region internal to the portion and heavily doped of a same first conductivity type as the substrate. A conductive plate is formed at the same time as the wall, on a layer of protection of the substrate surface, in electric contact with the peripheral region, the plate extending above said peripheral region towards the inside of the portion with respect to the wall, beyond the location above the limit between the peripheral region and the substrate.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: January 13, 2004
    Assignee: STMicroelectronics A.A.
    Inventor: Pascal Gardes
  • Publication number: 20030068884
    Abstract: A method for manufacturing, in a monolithic circuit comprising a substrate, an inductance and a through via, comprising the step of forming, from a first surface of the substrate, at least one trench according to the contour of the inductance to be formed; forming by laser in the substrate a through hole at the location desired for the via; simultaneously insulating the surface of the trench and of the hole; and depositing a conductive material in the trench and at least on the hole walls.
    Type: Application
    Filed: October 10, 2002
    Publication date: April 10, 2003
    Inventor: Pascal Gardes
  • Publication number: 20030066184
    Abstract: A method for manufacturing an inductance in a monolithic circuit including a substrate of planar upper surface, including the steps of forming in the substrate a cavity substantially following the contour of the inductance to be formed, the cross-section of the cavity being deep with respect to its width; and filling the cavity with a conductive material.
    Type: Application
    Filed: October 10, 2002
    Publication date: April 10, 2003
    Inventors: Pascal Gardes, Gerard Auriel
  • Publication number: 20030057485
    Abstract: A method for forming a component in a portion of a semiconductor substrate on insulator delimited by a lateral wall separated by an insulating layer from a peripheral region internal to the portion and heavily doped of a same first conductivity type as the substrate. A conductive plate is formed at the same time as the wall, on a layer of protection of the substrate surface, in electric contact with the peripheral region, the plate extending above said peripheral region towards the inside of the portion with respect to the wall, beyond the location above the limit between the peripheral region and the substrate.
    Type: Application
    Filed: September 26, 2002
    Publication date: March 27, 2003
    Inventor: Pascal Gardes
  • Publication number: 20030032294
    Abstract: A method for handling a thin silicon wafer including the steps of successively forming on a surface of the wafer a first protection layer, a first etch stop layer, and an external layer; forming on a surface of a support wafer a gluing layer of the same material as the external layer of the wafer, the surface of the support wafer including a plurality of pads, the respective upper portions of which are substantially planar and coplanar; fastening, by direct gluing, the external layer of the wafer and the gluing layer of the support wafer; processing the wafer to form circuits therein; depositing a second protection layer on the wafer surface which is not glued to the support wafer; and removing by an etch process the material forming the external layer of the wafer and the gluing layer of the support wafer.
    Type: Application
    Filed: August 13, 2002
    Publication date: February 13, 2003
    Inventor: Pascal Gardes