Patents by Inventor Pascal Meier

Pascal Meier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10130097
    Abstract: The invention relates to an object having a coating arranged on at least one surface of the object, which comprises at least one antimicrobially active layer having an antimicrobial agent, wherein the agent comprises a copper (I) compound and/or a copper (II) compound.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: November 20, 2018
    Assignee: GLAS TROESCH HOLDING AG
    Inventors: Pascal Meier, Walter Haag, Andriy Romanyuk
  • Publication number: 20170231229
    Abstract: The invention relates to an object having a coating arranged on at least one surface of the object, which comprises at least one antimicrobially active layer having an antimicrobial agent, wherein the agent comprises a copper (I) compound and/or a copper (II) compound.
    Type: Application
    Filed: February 15, 2017
    Publication date: August 17, 2017
    Inventors: Pascal Meier, Walter Haag, Andriy ROMANYUK
  • Publication number: 20170175928
    Abstract: Disclosed is a ball valve comprising a valve housing (2) that includes at least two fluid connection points (12, 14) and a valve ball (26) which is located in the valve housing (2) and which can be rotatingly actuated into switched positions by means of a switching shaft (32), at least part of which engages into the valve housing (2), a fluid connection between fluid connection points (12, 14) being opened or closed via a fluid passage (30) in the valve ball (26) in the switched positions of the valve ball (26). The disclosed ball valve is characterized in that a sensor array (52, 54) identifies each switched position of the valve ball (26) by reading positional information (48, 50) located thereon.
    Type: Application
    Filed: February 7, 2015
    Publication date: June 22, 2017
    Inventor: Pascal MEIER
  • Patent number: 8558636
    Abstract: A passive equalizer circuit is embedded within a substrate of a package containing an integrated circuit. It is believed that substantial reduction in uneven frequency dependent loss may be achieved for interconnects interconnecting the integrated circuit with other integrated circuits on a printed circuit board. Other aspects are described and claimed.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: October 15, 2013
    Assignee: Intel Corporation
    Inventors: Jaemin Shin, Pascal A. Meier, Telesphor Kamgaing, Kemal Aygun
  • Patent number: 7907418
    Abstract: A circuit board may include first and second sides, a plurality of circuit board layers between the sides, and a plurality of signal traces located in respective circuit board layers. The circuit board layers and the signal traces may extend from a first component connection region at the first side of the circuit board to a second component connection region at the first side of the circuit board. The signal traces may thus form stubless signal paths through the circuit board between the component connection regions. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: March 15, 2011
    Assignee: Intel Corporation
    Inventors: Pascal Meier, Sanjay Dabral
  • Publication number: 20100073892
    Abstract: A circuit board may include first and second sides, a plurality of circuit board layers between the sides, and a plurality of signal traces located in respective circuit board layers. The circuit board layers and the signal traces may extend from a first component connection region at the first side of the circuit board to a second component connection region at the first side of the circuit board. The signal traces may thus form stubless signal paths through the circuit board between the component connection regions. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Application
    Filed: December 1, 2009
    Publication date: March 25, 2010
    Applicant: INTEL CORPORATION
    Inventors: Pascal Meier, Sanjay Dabral
  • Patent number: 7671694
    Abstract: Embodiments of a programmable passive equalizer are described herein.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: March 2, 2010
    Assignee: Intel Corporation
    Inventors: Evelina F Yeung, Sanjay Dabral, Pascal Meier, Santanu Chaudhuri
  • Patent number: 7649745
    Abstract: A circuit board may include first and second sides, a plurality of circuit board layers between the sides, and a plurality of signal traces located in respective circuit board layers. The circuit board layers and the signal traces may extend from a first component connection region at the first side of the circuit board to a second component connection region at the first side of the circuit board. The signal traces may thus form stubless signal paths through the circuit board between the component connection regions. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: January 19, 2010
    Assignee: Intel Corporation
    Inventors: Pascal Meier, Sanjay Dabral
  • Publication number: 20080238587
    Abstract: A passive equalizer circuit is embedded within a substrate of a package containing an integrated circuit. It is believed that substantial reduction in uneven frequency dependent loss may be achieved for interconnects interconnecting the integrated circuit with other integrated circuits on a printed circuit board. Other aspects are described and claimed.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Jaemin Shin, Pascal A. Meier, Telesphor Kamgaing, Kemal Aygun
  • Publication number: 20080238588
    Abstract: Embodiments of a programmable passive equalizer are described herein.
    Type: Application
    Filed: June 2, 2008
    Publication date: October 2, 2008
    Inventors: Evelina F. Yeung, Sanjay Dabral, Pascal Meier, Santanu Chaudhuri
  • Patent number: 7394331
    Abstract: Embodiments of a programmable passive equalizer are described herein.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: July 1, 2008
    Inventors: Evelina F Yeung, Sanjay Dabral, Pascal Meier, Santanu Chaudhuri
  • Publication number: 20080123273
    Abstract: A circuit board may include first and second sides, a plurality of circuit board layers between the sides, and a plurality of signal traces located in respective circuit board layers. The circuit board layers and the signal traces may extend from a first component connection region at the first side of the circuit board to a second component connection region at the first side of the circuit board. The signal traces may thus form stubless signal paths through the circuit board between the component connection regions. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Application
    Filed: November 8, 2006
    Publication date: May 29, 2008
    Applicant: INTEL CORPORATION
    Inventors: Pascal Meier, Sanjay Dabral
  • Publication number: 20070030092
    Abstract: Embodiments of a programmable passive equalizer are described herein.
    Type: Application
    Filed: August 5, 2005
    Publication date: February 8, 2007
    Inventors: Evelina Yeung, Sanjay Dabral, Pascal Meier, Santanu Chaudhuri
  • Publication number: 20070004241
    Abstract: A method and apparatus, in some embodiments the apparatus includes a flex cable terminating at a first end and a second end and having a plurality of conductors therein, and a repeater circuit disposed between the first end and the second end and connected to at least one of the plurality of conductors to re-transmit a signal transmitted on the at least one of the plurality of conductors.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Inventors: Pascal Meier, Muraleedhara Navada, Sanjay Dabral
  • Publication number: 20060067066
    Abstract: A system and method are disclosed in which flex cables are affixed to PCBs, for providing high-speed signaling paths between ICs disposed upon the PCBs. The flex cables are fixably attached to the PCBs so as to substantially mimic their structural orientation. Where the configuration includes more than one PCB, the flex cables include multiple portions which are temporarily separable from one another and from the die, using flex-to-flex and flex-to-package connectors, allowing field maintenance of the configuration. By routing the high-speed signals between ICs onto the flex cable, single-layer PCBs can be used for non-critical and power delivery signals, at substantial cost savings. By disposing the flex cables onto the PCB rather than allowing the cables to float freely, the configuration is thermally managed as if the signals were on the PCB and cable routing problems are avoided.
    Type: Application
    Filed: September 27, 2004
    Publication date: March 30, 2006
    Inventors: Pascal Meier, Sanjay Dabral