Patents by Inventor Pascal Nsame

Pascal Nsame has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11054459
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: July 6, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Patent number: 10996259
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: May 4, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Patent number: 10989754
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: April 27, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Publication number: 20200141996
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Application
    Filed: January 3, 2020
    Publication date: May 7, 2020
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Publication number: 20200072897
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Application
    Filed: November 7, 2019
    Publication date: March 5, 2020
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Patent number: 10564214
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: February 18, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Patent number: 10089161
    Abstract: The present disclosure generally provides for a method of managing semiconductor manufacturing defects. The method includes: determining a cumulative aging parameter for each of a plurality of first IC products produced with a particular manufacturing line, the cumulative aging parameter being dependent on a product operating condition; calculating an observed defect rate for the plurality of first IC products based on a difference between a predicted value of the aging parameter and the cumulative aging parameter for each of the plurality of first IC products; and adjusting a manufacturing reliability model for the particular manufacturing line in response to the observed defect rate being different from a predicted defect rate for the plurality of first IC products.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: October 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jeanne P. S. Bickford, Nazmul Habib, Baozhen Li, Pascal A. Nsame
  • Publication number: 20180074114
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Application
    Filed: November 16, 2017
    Publication date: March 15, 2018
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Publication number: 20180074874
    Abstract: The present disclosure generally provides for a method of managing semiconductor manufacturing defects. The method includes: determining a cumulative aging parameter for each of a plurality of first IC products produced with a particular manufacturing line, the cumulative aging parameter being dependent on a product operating condition; calculating an observed defect rate for the plurality of first IC products based on a difference between a predicted value of the aging parameter and the cumulative aging parameter for each of the plurality of first IC products; and adjusting a manufacturing reliability model for the particular manufacturing line in response to the observed defect rate being different from a predicted defect rate for the plurality of first IC products.
    Type: Application
    Filed: November 7, 2017
    Publication date: March 15, 2018
    Inventors: Jeanne P. S. Bickford, Nazmul Habib, Baozhen Li, Pascal A. Nsame
  • Patent number: 9880892
    Abstract: A method of managing semiconductor manufacturing defects, the method including: determining a cumulative aging parameter for each of a plurality of first IC products produced with a particular manufacturing line, the cumulative aging parameter being dependent on a product operating condition; calculating an observed defect rate for the plurality of first IC products based on a difference between a predicted value of a aging parameter and the cumulative aging parameter for each of the plurality of first IC products; and adjusting a manufacturing reliability model for the particular manufacturing line in response to the observed defect rate being different from an initial predicted defect rate for the plurality of first IC products wherein the manufacturing reliability model reestablishes the initial predicted defect rate.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: January 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jeanne P. S. Bickford, Nazmul Habib, Baozhen Li, Pascal A. Nsame
  • Publication number: 20170285094
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Application
    Filed: June 22, 2017
    Publication date: October 5, 2017
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Patent number: 9739824
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: August 22, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Patent number: 9557378
    Abstract: Operating speeds of integrated circuit devices are tested to establish maximum and minimum frequency at maximum and minimum voltage. The devices are sorted into relatively-slow and relatively-fast devices to classify the devices into different voltage bins. A bin-specific voltage limit is established for each of the voltage bins needed for core performance at system use conditions. The bin-specific voltage limit is compared to core minimum chip-level functionality voltage at system maximum and minimum frequency specifications. The method correlates system design evaluation of design maximum and minimum frequency at design maximum and minimum voltage conditions with evaluation of tested maximum and minimum frequency at tested maximum and minimum voltage conditions. A chip-specific functionality voltage limit is established for the device.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: January 31, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Jeanne P. Bickford, Vikram Iyengar, Rahul K. Nadkarni, Pascal A. Nsame
  • Publication number: 20160258994
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Application
    Filed: May 16, 2016
    Publication date: September 8, 2016
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Patent number: 9395403
    Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: July 19, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
  • Patent number: 9367493
    Abstract: A method and system comprises transferring data from a first processor to at least one pulse generator directly connected to an interrupt control of at least a second processor. The transferring of the data bypasses memory. The method further includes reading the transferred data directly from the at least one pulse generator by the at least a second processor.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: June 14, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Robert J. Devins, David W. Milton, Pascal A. Nsame
  • Patent number: 9310426
    Abstract: Disclosed is an integrated circuit (IC) chip with a built-in self-test (BIST) architecture that allows for in the field accelerated stress testing. The IC chip can comprise an embedded processor, which selectively alternates operation of an on-chip test block between a stress mode and a test mode whenever the IC chip is powered-on such that, during the stress mode, the test block operates at a higher voltage level than an on-chip functional block and such that, during the test mode, the test block operates at a same voltage level as the functional block and is subjected to testing. Also disclosed are a system, method and computer program product which access the results of such testing from IC chips in a variety of different types of products in order model IC chip performance degradation and to generate IC chip end of life predictions specific to the different types of products.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: April 12, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Theodoros E. Anemikos, Douglas S. Dewey, Pascal A. Nsame, Anthony D. Polson
  • Publication number: 20150241511
    Abstract: The present disclosure generally provides for a method of managing semiconductor manufacturing defects. The method includes: determining a cumulative aging parameter for each of a plurality of first IC products produced with a particular manufacturing line, the cumulative aging parameter being dependent on a product operating condition; calculating an observed defect rate for the plurality of first IC products based on a difference between a predicted value of the aging parameter and the cumulative aging parameter for each of the plurality of first IC products; and adjusting a manufacturing reliability model for the particular manufacturing line in response to the observed defect rate being different from a predicted defect rate for the plurality of first IC products.
    Type: Application
    Filed: February 24, 2014
    Publication date: August 27, 2015
    Applicant: International Business Machines Corporation
    Inventors: Jeanne P. S. Bickford, Nazmul Habib, Baozhen Li, Pascal A. Nsame
  • Patent number: 9064087
    Abstract: Systems and methods for semiconductor device reliability qualification during semiconductor device design. A method is provided that includes defining performance process window bins for a performance window. The method further includes determining at least one failure mechanism for each bin assignment. The method further includes generating different reliability models when the at least one failure mechanism is a function of the process window, and generating common reliability models when the at least one failure mechanism is not the function of the process window. The method further includes identifying at least one risk factor for each bin assignment, and generating aggregate models using a manufacturing line distribution. The method further includes determining a fail rate by bin and optimizing a line center to minimize product fail rate. The method further includes determining a fail rate by bin and scrapping production as a function of a manufacturing line excursion event.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: June 23, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeanne P. Bickford, Nazmul Habib, Baozhen Li, Pascal A. Nsame
  • Patent number: 9058250
    Abstract: A remaining time to replace can be updated taking into account time variation of a failure mechanism of a device. Starting with an initial remaining time to replace, an effective operating time can be determined periodically based on an operating parameter measured at a tracking interval, and remaining time to replace can be updated by subtracting the effective operating time. The technique can be applied to multiple failure mechanisms and to multiple devices and/or components each having multiple failure mechanisms.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Jeanne P. S. Bickford, Nazmul Habib, Baozhen Li, Pascal A. Nsame