Abstract: A method of enabling communication between a first person and a second person is disclosed. The method includes receiving at a server a message from the first person, the message addressed to the second person constructed in a first language; determining a preferred language of receipt of a message by the second person; determining whether the preferred language is different than the first language; translating the message from the first language to the preferred language of receipt of the second person to create a translated message whenever the preferred language is different than the first language; and delivering the translated message to the second person.

Abstract: A design structure embodied in a machine readable medium used in a design process, the design structure including a system for dynamically varying the pipeline depth of a computing device, depending upon at least one of computing function and workload, the system further comprising a state machine configured to determine an optimum length of a pipeline architecture based on a processing function to be performed; a pipeline sequence controller, responsive to the state machine, the pipeline sequence controller configured to vary the depth of the pipeline based on the determined optimum length; and a plurality of clock splitter elements, each associated with a corresponding plurality of latch stages in the pipeline architecture, the clock splitter elements coupled to the pipeline sequence controller and adapted to operate in a functional mode, one or more clock gating modes, and a pass-through flush mode; wherein, for each of the clock splitter elements operating in the pass-through flush mode, data is passed th

Abstract: A method and system comprises transferring data from a first processor to at least one pulse generator directly connected to an interrupt control of at least a second processor. The transferring of the data bypasses memory. The method further includes reading the transferred data directly from the at least one pulse generator by the at least a second processor.