Patents by Inventor Pascal Oberndorff

Pascal Oberndorff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240429137
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes attaching a first semiconductor die to a first die pad of a first leadframe and attaching a second semiconductor die to a second die pad of a second leadframe. The first leadframe is attached to the second leadframe by way of a non-conductive adhesive. A first plurality of leads of the first leadframe are interleaved with leads of a second plurality of leads of the second leadframe. The first and second semiconductor die and portions of the first and second leadframes are encapsulated with an encapsulant.
    Type: Application
    Filed: June 20, 2023
    Publication date: December 26, 2024
    Inventors: Hsin-En Cheng, Pascal Oberndorff, Yu Chen Li, Hsiu Chun Li
  • Patent number: 11031681
    Abstract: A method of manufacturing a packaged semiconductor device is provided. The method includes attaching a semiconductor die to a package substrate. A bond pad of the semiconductor die is coupled to an antenna radiator formed on the package substrate. A waveguide is attached to the package substrate. An opening of the waveguide includes sidewalls substantially surrounding the antenna radiator. An epoxy material is deposited over at least a portion of the package substrate while leaving the opening void of epoxy material.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: June 8, 2021
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Stephen Ryan Hooper, Pascal Oberndorff, Walter Parmon
  • Publication number: 20200403298
    Abstract: A method of manufacturing a packaged semiconductor device is provided. The method includes attaching a semiconductor die to a package substrate. A bond pad of the semiconductor die is coupled to an antenna radiator formed on the package substrate. A waveguide is attached to the package substrate. An opening of the waveguide includes sidewalls substantially surrounding the antenna radiator. An epoxy material is deposited over at least a portion of the package substrate while leaving the opening void of epoxy material.
    Type: Application
    Filed: June 20, 2019
    Publication date: December 24, 2020
    Inventors: Michael B. Vincent, Scott M. Hayes, Zhiwei Gong, Stephen Ryan Hooper, Pascal Oberndorff, Walter Parmon
  • Patent number: 8603643
    Abstract: The invention relates to an electronic component with Sn rich deposit layer on the part for electric connection, wherein the Sn rich deposit layer is a fine grained Sn rich deposit layer composed of grains with smaller size in the direction perpendicular to the deposit surface than in the direction parallel to the deposit surface. It also relates to a process for plating an electronic component, so as to form a Sn rich deposit layer on the part for electric connection, comprising the steps of: adjusting the composition of tin plating solution in which starter additive and brighter additive are included; moving the electronic component through the tin plating solution, so as to form a fine grained Sn rich deposit layer on the part for electric connection. As compared with the prior art, the invention can validly inhibit the whisker growth with low cost and reliable property.
    Type: Grant
    Filed: July 4, 2005
    Date of Patent: December 10, 2013
    Assignee: NXP, B.V.
    Inventors: Cheng-Fu Yu, Chia-Chun Chen, Pascal Oberndorff, Ker-Chang Hsieh
  • Publication number: 20080038574
    Abstract: The invention relates to an electronic component with Sn rich deposit layer on the part for electric connection, wherein the Sn rich deposit layer is a fine grained Sn rich deposit layer composed of grains with smaller size in the direction perpendicular to the deposit surface than in the direction parallel to the deposit surface. It also relates to a process for plating an electronic component, so as to form a Sn rich deposit layer on the part for electric connection, comprising the steps of: adjusting the composition of tin plating solution in which starter additive and brighter additive are included; moving the electronic component through the tin plating solution, so as to form a fine grained Sn rich deposit layer on the part for electric connection. As compared with the prior art, the invention can validly inhibit the whisker growth with low cost and reliable property.
    Type: Application
    Filed: July 4, 2005
    Publication date: February 14, 2008
    Inventors: Cheng-Fu Yu, Chia-Chun Chen, Pascal Oberndorff, Ker-Chang Hsieh