Patents by Inventor Pascal Peyrot

Pascal Peyrot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230232528
    Abstract: Power amplifier systems including power amplifier modules (PAMs) and electromagnetic bandgap (EBG) isolation structures are disclosed. In embodiments, the power amplifier system includes a printed circuit board (PCB) and a PAM mounted to the PCB in an inverted orientation. The PCB has a PCB frontside on which a PAM mount region is provided, and radio frequency (RF) input and output bondpads. The PAM includes a topside input/output interface having RF input and output terminals electrically coupled to the RF input and output pads, respectively. The power amplifier system further includes a first EBG isolation structure containing a first grounded EBG cell array, at least a portion of which is located within or beneath the PAM mount region.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 20, 2023
    Inventors: Yu-Ting David Wu, Pascal Peyrot, Xavier Hue
  • Patent number: 11705870
    Abstract: Aspects of the subject disclosure may include a power splitter. The power splitter can include a first splitter branch having a first amplifier with passive components, a second splitter branch having a second amplifier with passive components. The first splitter branch is substantially electrically isolated from the second splitter branch by configuring the first and second splitter branches to have similar phase delays. Outputs of the power splitter can be electrically coupled to the multi-stage amplifier. The power splitter can be manufactured on a single semiconductor die or integrally formed on the same semiconductor die with other circuits such as the multi-stage amplifier. Other embodiments are disclosed.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: July 18, 2023
    Assignee: NXP USA, Inc.
    Inventors: Xavier Hue, Olivier Lembeye, Pascal Peyrot
  • Publication number: 20220021343
    Abstract: Aspects of the subject disclosure may include a power splitter. The power splitter can include a first splitter branch having a first amplifier with passive components, a second splitter branch having a second amplifier with passive components. The first splitter branch is substantially electrically isolated from the second splitter branch by configuring the first and second splitter branches to have similar phase delays. Outputs of the power splitter can be electrically coupled to the multi-stage amplifier. The power splitter can be manufactured on a single semiconductor die or integrally formed on the same semiconductor die with other circuits such as the multi-stage amplifier. Other embodiments are disclosed.
    Type: Application
    Filed: September 17, 2020
    Publication date: January 20, 2022
    Inventors: Xavier Hue, Olivier Lembeye, Pascal Peyrot
  • Patent number: 10951180
    Abstract: Embodiments of an RF amplifier include a transistor with a control terminal and first and second current carrying terminals, and a shunt circuit coupled between the first current carrying terminal and a ground reference node. The shunt circuit is an output pre-match impedance conditioning shunt circuit, which includes a first shunt inductance, a second shunt inductance, and a shunt capacitor coupled in series. The first shunt inductance comprises a plurality of bondwires coupled between the first current carrying terminal and the second shunt inductance, and the second shunt inductance comprises an integrated inductor coupled between the first shunt inductance and a first terminal of the shunt capacitor. The shunt capacitor is configured to provide capacitive harmonic control of an output of the transistor.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: March 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Pascal Peyrot, Olivier Lembeye, Enver Krvavac
  • Publication number: 20190190464
    Abstract: Embodiments of an RF amplifier include a transistor with a control terminal and first and second current carrying terminals, and a shunt circuit coupled between the first current carrying terminal and a ground reference node. The shunt circuit is an output pre-match impedance conditioning shunt circuit, which includes a first shunt inductance, a second shunt inductance, and a shunt capacitor coupled in series. The first shunt inductance comprises a plurality of bondwires coupled between the first current carrying terminal and the second shunt inductance, and the second shunt inductance comprises an integrated inductor coupled between the first shunt inductance and a first terminal of the shunt capacitor. The shunt capacitor is configured to provide capacitive harmonic control of an output of the transistor.
    Type: Application
    Filed: December 6, 2018
    Publication date: June 20, 2019
    Inventors: Pascal PEYROT, Olivier LEMBEYE, Enver KRVAVAC
  • Patent number: 10211170
    Abstract: A system and method for a packaged device with harmonic control are presented. In one embodiment, a device includes a substrate and a transistor die coupled to the substrate. The transistor die includes a plurality of transistor cells. Each transistor cell in the plurality of transistor cells includes a control (e.g., gate) terminal. The device includes a second die coupled to the substrate. The second die includes a plurality of individual shunt capacitors coupled between the control terminals of the plurality of transistor cells and a ground reference node. The capacitance values of at least two of the shunt capacitors are significantly different.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: February 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Pascal Peyrot, Olivier Lembeye, Sai Sunil Mangaonkar
  • Patent number: 10110178
    Abstract: In a system comprising a plurality of gain elements configured in parallel to one another, a harmonically tuned filter provides an isolation circuit to prevent odd-mode differential oscillations. A harmonically tuned filter comprises resistors, inductors, and capacitors (RLC) to selectively allow one or more specific harmonics to pass through the isolation circuit to suppress the odd-mode oscillation. Direct current (DC) and other non-harmonically-related frequencies do not pass through the isolation circuit. Since the resistor is used to dissipate specifically the energy of the harmonic frequencies causing the odd-mode oscillation, the current density through the resistor is much lower than the current density of a typical odd-mode resistor without a harmonically tuned filter.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: October 23, 2018
    Assignee: NXP USA, INC.
    Inventors: Kevin Kim, Igor Ivanovich Blednov, Olivier Lembeye, Pascal Peyrot
  • Publication number: 20180061785
    Abstract: A system and method for a packaged device with harmonic control are presented. In one embodiment, a device includes a substrate and a transistor die coupled to the substrate. The transistor die includes a plurality of transistor cells. Each transistor cell in the plurality of transistor cells includes a control (e.g., gate) terminal. The device includes a second die coupled to the substrate. The second die includes a plurality of individual shunt capacitors coupled between the control terminals of the plurality of transistor cells and a ground reference node. The capacitance values of at least two of the shunt capacitors are significantly different.
    Type: Application
    Filed: August 10, 2017
    Publication date: March 1, 2018
    Inventors: Pascal Peyrot, Olivier Lembeye, Sai Sunil Mangaonkar
  • Publication number: 20160056765
    Abstract: In a system comprising a plurality of gain elements configured in parallel to one another, a harmonically tuned filter provides an isolation circuit to prevent odd-mode differential oscillations. A harmonically tuned filter comprises resistors, inductors, and capacitors (RLC) to selectively allow one or more specific harmonics to pass through the isolation circuit to suppress the odd-mode oscillation. Direct current (DC) and other non-harmonically-related frequencies do not pass through the isolation circuit. Since the resistor is used to dissipate specifically the energy of the harmonic frequencies causing the odd-mode oscillation, the current density through the resistor is much lower than the current density of a typical odd-mode resistor without a harmonically tuned filter.
    Type: Application
    Filed: November 21, 2014
    Publication date: February 25, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kevin Kim, Igor Ivanovich Blednov, Olivier Lembeye, Pascal Peyrot
  • Patent number: 9038529
    Abstract: A coffee machine comprises a frothing device, wherein an internal milk channel leading to a frothing chamber is provided into which opens a bypass air inlet for operable air supply to the frothing device. A flexible milk suction line connects the frothing device with a milk supply container. Means are provided for cleaning the frothing device and the milk suction line with rinsing water from a continuous-flow water heater of the coffee machine. A controlled valve arrangement is provided which feeds rinsing water from the continuous-flow water heater to the bypass air inlet of the frothing device. A milk suction end of the milk suction line is directly or indirectly, fluid-conductively connectable with a residual water pan of the coffee machine prior to feeding rinsing water to the bypass air inlet.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: May 26, 2015
    Assignee: EUGSTER/FRISMAG AG
    Inventors: Wolfgang Riessbeck, Pascal Peyrot
  • Publication number: 20110192287
    Abstract: A coffee machine comprises a frothing device, wherein an internal milk channel leading to a frothing chamber is provided into which opens a bypass air inlet for operable air supply to the frothing device. A flexible milk suction line connects the frothing device with a milk supply container. Means are provided for cleaning the frothing device and the milk suction line with rinsing water from a continuous-flow water heater of the coffee machine. A controlled valve arrangement is provided which feeds rinsing water from the continuous-flow water heater to the bypass air inlet of the frothing device. A milk suction end of the milk suction line is directly or indirectly, fluid-conductively connectable with a residual water pan of the coffee machine prior to feeding rinsing water to the bypass air inlet.
    Type: Application
    Filed: February 4, 2011
    Publication date: August 11, 2011
    Applicant: Eugster/Frismag AG
    Inventors: Wolfgang RIESSBECK, Pascal Peyrot
  • Patent number: 7639083
    Abstract: Parasitic coupling effects between RF or microwave transistors provided in a common package are compensated by connecting one or more capacitors between the transistors. By connecting the capacitor(s) at a location that corresponds to the site of the coupling, the compensation is effective over a wide frequency band. This coupling-compensation makes it feasible to provide, in a common package, RF or microwave transistors intended to operate in quadrature, thereby improving performance matching and operating efficiency of the overall device.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: December 29, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jean Jacques Bouny, Pascal Peyrot
  • Publication number: 20080224771
    Abstract: Parasitic coupling effects between RF or microwave transistors provided in a common package are compensated by connecting one or more capacitors between the transistors. By connecting the capacitor(s) at a location that corresponds to the site of the coupling, the compensation is effective over a wide frequency band. This coupling-compensation makes it feasible to provide, in a common package, RF or microwave transistors intended to operate in quadrature, thereby improving performance matching and operating efficiency of the overall device.
    Type: Application
    Filed: July 5, 2005
    Publication date: September 18, 2008
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Jean Jacques Bouny, Pascal Peyrot