Abstract: A variable digital phase-shifter comprises a variable-propagation-time phase corrector consisting of a nonrecursive transversal digital filter having a predetermined even number N of coefficients. The filter is coupled with an amplitude corrector consisting of a nonrecursive transversal digital bandpass filter with an odd number of coefficients, a multiplier and a summing circuit for correcting the variations in gain of the phase corrector in order to obtain an approximately constant overall gain of the variable digital phase-shifter.

Abstract: A method and apparatus for sampling a sine wave input signal E(t) with a sampling signal A(t) so as to minimize, in one adjustment, the phase difference between the input signal E(t) and the sampling signal A(t). The input signal E(t) has a frequency F and a cycle T and is used to generate a signal D(t) which has a frequency kf and a phase which is dependent on the phase of input signal E(t), k is a positive integer. The signal D(t) is used to generate a sampling signal A(t) which has a plurality p of possible phase settings, p is a positive integer. Each phase setting is adjusted, with respect to its neighbor phase settings, by increments of T/kp. The phase difference between the sampling signal A(t) and the input signal E(t) is then determined. One of the p possible phase settings of sampling signal A(t) is then selected which minimizes the phase difference. The sampling signal A(t) will thus have a phase which has been adjusted to within T/kp of the input signal phase, in one jump.

Abstract: According to the invention, on the basis of a logic signal of frequency F a multiplier processes a signal of frequency 4F sampling a A/D converter, which supplies at its outputs the digital values and a bit representing the sign of sin .0. and cos .0.. These values, processed by a circuit, are restored by two registers, which supply the absolute values of A sin .0. and A cos .0.. These values are compared in a comparator and as a function of the ratio .vertline.sin .0..vertline./.vertline.cos .0..vertline. an inverting PROM and a multiplier calculate either .vertline.tan .0..vertline. or .vertline.cot .0..vertline.. The phase angle .0. is extracted by a PROM knowing .vertline.tan .0..vertline. or .vertline.cot .0..vertline. and the sine and cosine signs.

Abstract: At the time of analog-to-digital conversion by sampling of a sine-wave signal having a frequency F by means of a clock signal having a frequency 4nF where n is a whole number, these two signals exhibit a residual phase error .PHI.. The method for correcting the converted digital signal according to the invention consists in delaying this signal by n periods of the clock signal in a shift register, in multiplying the undelayed signal by cos .PHI., in multiplying the delayed signal by sin .PHI. and in transmitting the results to an adder.