Abstract: This disclosure relates to a bootstrapped switching circuit. Example embodiments include a bootstrapped switching circuit (100) comprising: a positive output node (109+); a negative output node (109?); a first input node (106a) configured to receive a first input voltage (Vin1); a second input node (106b) configured to receive a second input voltage (Vin2). First, second third and fourth switches (101-104) are coupled between the input and output nodes (106a, 106b, 109+, 109?). A first negative bootstrapped level shifter (107a) and a first positive bootstrapped level shifter (107b) coupled between the first input node (106a) and a first clock signal circuit (110a) provide control signals to the first and second switches (101, 102). A second negative bootstrapped level shifter (108a) and a second positive bootstrapped level shifter (108b) coupled between the second input node (106b) and a second ground referenced supply line (110b) provide control signals to the third and fourth switches (103, 104).

Abstract: A sigma-delta ADC comprising: a first-input-resistor connected in series between a first-input-terminal and a first-feedback-node; a second-input-resistor connected in series between a second-input-terminal and a second-feedback-node; a third-input-resistor connected in series between a third-input-terminal and a third-feedback-node; a first-multiplexer-switch connected in series between the first-feedback-node and a first-amplifier-second-input-terminal; a second-multiplexer-switch connected in series between the second-feedback-node and a first-amplifier-first-input-terminal; a third-multiplexer-switch connected in series between the third-feedback-node and the first-amplifier-second-input-terminal; a first-feedback-current-source having a first terminal and second terminal, wherein the second terminal is connected to a reference-terminal; a second-feedback-current-source having a first terminal and second terminal, wherein the second terminal is connected to the reference-terminal; a first-feedback-selecti

Abstract: A sigma-delta ADC comprising: a first-input-terminal configured to receive a first-high-voltage-analogue-input-signal; a second-input-terminal configured to receive a second-high-voltage-analogue-input-signal; an output-terminal configured to provide an output-digital-signal, wherein the output-digital-signal is representative of the difference between the first-high-voltage-analogue-input-signal and the second-high-voltage-analogue-input-signal. The sigma-delta ADC also includes a feedback-current-block, which comprises: a first-feedback-transistor having a conduction channel; a second-feedback-transistor having a conduction channel; a first-feedback-switch; a second-feedback-switch; a first-feedback-current-source; and a second-feedback-current-source.

Abstract: A sigma-delta ADC comprising: a first-input-terminal configured to receive a first-high-voltage-analogue-input-signal; a second-input-terminal configured to receive a second-high-voltage-analogue-input-signal; an output-terminal configured to provide an output-digital-signal, wherein the output-digital-signal is representative of the difference between the first-high-voltage-analogue-input-signal and the second-high-voltage-analogue-input-signal. The sigma-delta ADC also includes a feedback-current-block, which comprises: a first-feedback-transistor having a conduction channel; a second-feedback-transistor having a conduction channel; a first-feedback-switch; a second-feedback-switch; a first-feedback-current-source; and a second-feedback-current-source.

Abstract: A method comprising: recording test code defined in a high-level test specification language; and automated analysis of the test code defined in the high-level test specification language before a conversion of the high-level test specification language to a low-level test implementation language configured to enable testing of a target by a test module.

Abstract: A detector (110) detects an unwanted oscillation generated by a closed-loop system (112) due to disconnection, improper usage, or absence of a stability-controlling element (104) necessary for the closed-loop system to function properly. An integrated circuit (102) includes the closed-loop system, the detector, and a supervisory system (114) that disables the closed-loop system upon disconnection of the stability-controlling element from the closed-loop system.

Abstract: A detector (110) detects an unwanted oscillation generated by a closed-loop system (112) due to disconnection, improper usage, or absence of a stability-controlling element (104) necessary for the closed-loop system to function properly. An integrated circuit (102) includes the closed-loop system, the detector, and a supervisory system (114) that disables the closed-loop system upon disconnection of the stability-controlling element from the closed-loop system.

Abstract: A buck converter has an output node and a ground node, wherein a load is connected between the output node and the ground node and is arranged to drive an output current I_out through the output node, generating an output voltage V_out. A current control unit arranged to control the output current I_out in dependence on a control voltage V_ctl provided at a control node; and a voltage control unit arranged to provide the control voltage V_ctl. The voltage control unit comprises: an integrator unit arranged to control the control voltage V_ctl in dependence on a time integral of a difference between the output voltage and the reference voltage; at least one of an overshoot detector arranged to detect an overshoot of the output voltage V_out, and an undershoot detector arranged to detect an undershoot of the output voltage V_out.

Abstract: A method comprising: recording test code defined in a high-level test specification language; and automated analysis of the test code defined in the high-level test specification language before a conversion of the high-level test specification language to a low-level test implementation language configured to enable testing of a target by a test module.

Abstract: A buck converter has an output node and a ground node, wherein a load is connected between the output node and the ground node and is arranged to drive an output current I_out through the output node, generating an output voltage V_out. A current control unit arranged to control the output current I_out in dependence on a control voltage V_ctl provided at a control node; and a voltage control unit arranged to provide the control voltage V_ctl. The voltage control unit comprises: an integrator unit arranged to control the control voltage V_ctl in dependence on a time integral of a difference between the output voltage and the reference voltage; at least one of an overshoot detector arranged to detect an overshoot of the output voltage V_out, and an undershoot detector arranged to detect an undershoot of the output voltage V_out.