Patents by Inventor Pascal Scheiblin

Pascal Scheiblin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210126118
    Abstract: An electronic component includes a substrate; a stack of two layers of different semiconductor materials, designed to form a layer of electron gas at the interface thereof or close to same; and a buried barrier forming a separation between the substrate and said stack. The buried barrier includes a first layer of a ternary alloy of semiconductor material of the III-N type, having an increasing concentration of one of the chemical species of the ternary alloy of the first layer the closer it is to the substrate; and a second layer of a ternary alloy of semiconductor material of the III-N type, formed beneath the first layer and having a decreasing concentration of one of the chemical species of the ternary alloy of the first layer the closer it is to the substrate.
    Type: Application
    Filed: November 26, 2018
    Publication date: April 29, 2021
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Yannick BAINES, Pascal SCHEIBLIN
  • Patent number: 9728405
    Abstract: A semiconductor device is provided, including two semiconductor nanowires superimposed one on top of the other or arranged next to one another, spaced one from the other and forming channel regions of the semiconductor device, a dielectric structure entirely filling a space between the nanowires and which is in contact with the nanowires, a gate dielectric and a gate covering a first of the nanowires, sidewalls of the nanowires and sidewalls of the dielectric structure when the nanowires are superimposed one on top of the other, or covering a part of the upper faces of the nanowires and a part of an upper face of the dielectric structure when the nanowires are arranged next to one another, and wherein the dielectric structure comprises a portion of dielectric material with a relative permittivity greater than or equal to 20.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: August 8, 2017
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventors: Sylvain Barraud, Pierrette Rivallin, Pascal Scheiblin
  • Publication number: 20150194489
    Abstract: A semiconductor device is provided, including two semiconductor nanowires superimposed one on top of the other or arranged next to one another, spaced one from the other and forming channel regions of the semiconductor device, a dielectric structure entirely filling a space between the nanowires and which is in contact with the nanowires, a gate dielectric and a gate covering a first of the nanowires, sidewalls of the nanowires and sidewalls of the dielectric structure when the nanowires are superimposed one on top of the other, or covering a part of the upper faces of the nanowires and a part of an upper face of the dielectric structure when the nanowires are arranged next to one another, and wherein the dielectric structure comprises a portion of dielectric material with a relative permittivity greater than or equal to 20.
    Type: Application
    Filed: December 23, 2014
    Publication date: July 9, 2015
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Sylvain BARRAUD, Pierrette Rivallin, Pascal Scheiblin