Abstract: A direct bonded heterogeneous integration (DBHi) device includes a substrate including a trench formed in a top surface of the substrate. The DBHi device further includes a first chip coupled to the substrate on a first side of the trench by a plurality of first interconnects. The DBHi device further includes a second chip coupled to the substrate on a second side of the trench by a plurality of second interconnects. The second side of the trench is arranged opposite the first side of the trench. The DBHi device further includes a bridge coupled to the first chip and to the second chip by a plurality of third interconnects such that the bridge is suspended in the trench. The DBHi device further includes a non-conductive paste material surrounding the plurality of third interconnects to further couple the bridge to the first chip and to the second chip.

Abstract: A direct bonded heterogeneous integration (DBHi) device includes a substrate including a trench formed in a top surface of the substrate. The DBHi device further includes a first chip coupled to the substrate on a first side of the trench by a plurality of first interconnects. The DBHi device further includes a second chip coupled to the substrate on a second side of the trench by a plurality of second interconnects. The second side of the trench is arranged opposite the first side of the trench. The DBHi device further includes a bridge coupled to the first chip and to the second chip by a plurality of third interconnects such that the bridge is suspended in the trench. The DBHi device further includes a non-conductive paste material surrounding the plurality of third interconnects to further couple the bridge to the first chip and to the second chip.

Abstract: Multicomponent module assembly by identifying a failed site on a laminate comprising a plurality of sites, adding a machine discernible mark associated with the failed site, placing an electrically good element at a successful site; and providing an MCM comprising the laminate, and the electrically good element.

Abstract: An electronic package and a method of manufacture includes a substrate having an upper surface with a trench formed in a bridge region. First pads are arranged on the upper surface of the substrate, outside of the bridge region, and a bridge is positioned in the trench. A plurality of second pads are arranged on an upper surface of the bridge. A plurality of pillars are electrically coupled to the plurality of second pads. Two or more semiconductor chips are positioned in a side-by-side proximal arrangement overlaying the bridge and the substrate. A first semiconductor chip is joined to the bridge, then a second semiconductor chip is joined to the bridge, followed by attaching the chip-bridge assembly to the substrate with the bridge positioned within the substrate trench. Each of the two or more semiconductor chips have first electrical connections including bumps, and second electrical connections including third pads.

Abstract: An electronic package and a method of manufacture includes a substrate having an upper surface with a trench formed in a bridge region. First pads are arranged on the upper surface of the substrate, outside of the bridge region, and a bridge is positioned in the trench. A plurality of second pads are arranged on an upper surface of the bridge. A plurality of pillars are electrically coupled to the plurality of second pads. Two or more semiconductor chips are positioned in a side-by-side proximal arrangement overlaying the bridge and the substrate. A first semiconductor chip is joined to the bridge, then a second semiconductor chip is joined to the bridge, followed by attaching the chip-bridge assembly to the substrate with the bridge positioned within the substrate trench. Each of the two or more semiconductor chips have first electrical connections including bumps, and second electrical connections including third pads.

Abstract: A package and system for high-density chip-to-chip interconnection is provided. Embodiments of the present invention utilizes a plurality of circuit dies including a laminate substrate adjacent to the plurality of circuit dies. It also includes a conductive spacer disposed between the laminate substrate and one of the plurality of circuit dies, a silicon bridge and a conductive interposer disposed between the laminate substrate and the plurality of dies and adjacent to the conductive spacer. Furthermore the embodiment of this present invention can include a top layer of a printed circuit board (PCB) coupled with a bottom layer of the laminate substrate. The conductive spacer comprises, at least of, a laminate, organic or copper material.

Abstract: A package and system for high-density chip-to-chip interconnection is provided. Embodiments of the present invention utilizes a plurality of circuit dies including a laminate substrate adjacent to the plurality of circuit dies. It also includes a conductive spacer disposed between the laminate substrate and one of the plurality of circuit dies, a silicon bridge and a conductive interposer disposed between the laminate substrate and the plurality of dies and adjacent to the conductive spacer. Furthermore the embodiment of this present invention can include a top layer of a printed circuit board (PCB) coupled with a bottom layer of the laminate substrate. The conductive spacer comprises, at least of, a laminate, organic or copper material.

Abstract: An apparatus for reducing EMI at the micro-electronic-component level includes a substrate having a ground conductor integrated therein. A micro-electronic component such as an integrated circuit is mounted to the substrate. An electrically conductive lid is mounted to the substrate, thereby forming a physical interface with the substrate. The electrically conductive lid substantially covers the micro-electronic component. A conductive link is provided to create an electrical connection between the electrically conductive lid and the ground conductor at the physical interface.

Abstract: An apparatus for reducing EMI at the micro-electronic-component level includes a substrate having a ground conductor integrated therein. A micro-electronic component such as an integrated circuit is mounted to the substrate. An electrically conductive lid is mounted to the substrate, thereby forming a physical interface with the substrate. The electrically conductive lid substantially covers the micro-electronic component. A conductive link is provided to create an electrical connection between the electrically conductive lid and the ground conductor at the physical interface.

Abstract: An apparatus for reducing EMI at the micro-electronic-component level includes a substrate having a ground conductor integrated therein. A micro-electronic component such as an integrated circuit is mounted to the substrate. An electrically conductive lid is mounted to the substrate, thereby forming a physical interface with the substrate. The electrically conductive lid substantially covers the micro-electronic component. A conductive link is provided to create an electrical connection between the electrically conductive lid and the ground conductor at the physical interface.

Abstract: An apparatus for reducing EMI at the micro-electronic-component level includes a substrate having a ground conductor integrated therein. A micro-electronic component such as an integrated circuit is mounted to the substrate. An electrically conductive lid is mounted to the substrate, thereby forming a physical interface with the substrate. The electrically conductive lid substantially covers the micro-electronic component. A conductive link is provided to create an electrical connection between the electrically conductive lid and the ground conductor at the physical interface.