Patents by Inventor Pat Donlin

Pat Donlin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11740674
    Abstract: Systems and methods described herein make previously stranded power capacity (power that is provisioned for a data center according to a computing system's nameplate power consumption but is currently not useable) available to the data center. Systems described herein generate empirical power profiles that specify expected upper bounds for the power consumption levels that applications trigger. Using the upper bounds for application power-consumption levels, a computing system described herein can reliably release part of its provisioned nameplate power for other systems or data center consumers, reducing the amount of stranded power in a data center. The method described herein avoids performance penalties for most jobs by using sensor measurements made at a rapid rate explained herein to ensure that a system power cap based on running application's measured peak power consumption is reliable with reference to the power capacitance inherent in the computing system.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: August 29, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Torsten Wilde, Andy Warner, Steven Dean, Steven Martin, Pat Donlin
  • Publication number: 20220253118
    Abstract: Systems and methods described herein make previously stranded power capacity (power that is provisioned for a data center according to a computing system's nameplate power consumption but is currently not useable) available to the data center. Systems described herein generate empirical power profiles that specify expected upper bounds for the power consumption levels that applications trigger. Using the upper bounds for application power-consumption levels, a computing system described herein can reliably release part of its provisioned nameplate power for other systems or data center consumers, reducing the amount of stranded power in a data center. The method described herein avoids performance penalties for most jobs by using sensor measurements made at a rapid rate explained herein to ensure that a system power cap based on running application's measured peak power consumption is reliable with reference to the power capacitance inherent in the computing system.
    Type: Application
    Filed: March 28, 2022
    Publication date: August 11, 2022
    Inventors: Torsten Wilde, Andy Warner, Steven Dean, Steven Martin, Pat Donlin
  • Patent number: 11307627
    Abstract: Systems and methods described herein make previously stranded power capacity (power that is provisioned for a data center according to a computing system's nameplate power consumption but is currently not useable) available to the data center. Systems described herein generate empirical power profiles that specify expected upper bounds for the power consumption levels that applications trigger. Using the upper bounds for application power-consumption levels, a computing system described herein can reliably release part of its provisioned nameplate power for other systems or data center consumers, reducing the amount of stranded power in a data center. The method described herein avoids performance penalties for most jobs by using sensor measurements made at a rapid rate explained herein to ensure that a system power cap based on running application's measured peak power consumption is reliable with reference to the power capacitance inherent in the computing system.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: April 19, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Torsten Wilde, Andy Warner, Steven Dean, Steven Martin, Pat Donlin
  • Publication number: 20210341984
    Abstract: Systems and methods described herein make previously stranded power capacity (power that is provisioned for a data center according to a computing system's nameplate power consumption but is currently not useable) available to the data center. Systems described herein generate empirical power profiles that specify expected upper bounds for the power consumption levels that applications trigger. Using the upper bounds for application power-consumption levels, a computing system described herein can reliably release part of its provisioned nameplate power for other systems or data center consumers, reducing the amount of stranded power in a data center. The method described herein avoids performance penalties for most jobs by using sensor measurements made at a rapid rate explained herein to ensure that a system power cap based on running application's measured peak power consumption is reliable with reference to the power capacitance inherent in the computing system.
    Type: Application
    Filed: April 30, 2020
    Publication date: November 4, 2021
    Inventors: Torsten Wilde, Andy Warner, Steven Dean, Steven Martin, Pat Donlin
  • Patent number: 10235233
    Abstract: The present disclosure relates to an apparatus and a method for collecting failure/error history lists to identify and categorize erring memory locations in randomly accessible memory of a computer system. Method and apparatus consistent with the present disclosure may identify whether particular memory cells, rows of memory cells, or columns of memory cells within a memory device are associated with transient or persistent errors. These methods and apparatus may also avoid using portions of memory that have been associated with persistent errors or failures.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: March 19, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Pat Donlin
  • Publication number: 20170123879
    Abstract: The present disclosure relates to an apparatus and a method for collecting failure/error history lists to identify and categorize erring memory locations in randomly accessible memory of a computer system. Method and apparatus consistent with the present disclosure may identify whether particular memory cells, rows of memory cells, or columns of memory cells within a memory device are associated with transient or persistent errors. These methods and apparatus may also avoid using portions of memory that have been associated with persistent errors or failures.
    Type: Application
    Filed: October 27, 2016
    Publication date: May 4, 2017
    Inventor: Pat Donlin