Patents by Inventor Pat Lasserre

Pat Lasserre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230359698
    Abstract: A device for in memory vector-matrix multiplication includes a memory array and in-memory logic. The memory array has at least two sections and stores a multiplier matrix. The memory array also receives and stores an input multiplicand arranged in a vector such that the operands of the vector-matrix multiplication are located on a same column of the memory array. Each of the sections is one of: a volatile memory array, a non-volatile memory array, a destructive memory array and a non-destructive memory array. The in-memory logic computes an output of the vector-matrix multiplication using the stored input vector and the stored multiplier matrix. The memory array is one of the following type of memory array: RAM, DRAM, SRAM, Re-RAM, ZRAM, MRAM and Memristor.
    Type: Application
    Filed: July 19, 2023
    Publication date: November 9, 2023
    Inventors: Avidan AKERIB, Pat LASSERRE
  • Patent number: 11734385
    Abstract: A method for in memory computation of a neural network, the neural network having weights arranged in a matrix, includes previously storing the matrix in an associated memory device, receiving an input arranged in a vector and storing it in the memory device, and in-memory, computing an output of the network using the input and the weights.
    Type: Grant
    Filed: March 7, 2021
    Date of Patent: August 22, 2023
    Assignee: GSI Technology Inc.
    Inventors: Avidan Akerib, Pat Lasserre
  • Publication number: 20210209191
    Abstract: A method for in memory computation of a neural network, the neural network having weights arranged in a matrix, includes previously storing the matrix in an associated memory device, receiving an input arranged in a vector and storing it in the memory device, and in-memory, computing an output of the network using the input and the weights.
    Type: Application
    Filed: March 7, 2021
    Publication date: July 8, 2021
    Inventors: Avidan AKERIB, Pat LASSERRE
  • Patent number: 10997275
    Abstract: A method for an associative memory array includes storing each column of a matrix in an associated column of the associative memory array, where each bit in row j of the matrix is stored in row R-matrix-row-j of the array, storing a vector in each associated column, where a bit j from the vector is stored in an R-vector-bit-j row of the array. The method includes simultaneously activating a vector-matrix pair of rows R-vector-bit-j and R-matrix-row-j to concurrently receive a result of a Boolean function on all associated columns, using the results to calculate a product between the vector-matrix pair of rows, and writing the product to an R-product-j row in the array.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: May 4, 2021
    Assignee: GSI Technology Inc.
    Inventors: Avidan Akerib, Pat Lasserre
  • Publication number: 20170277659
    Abstract: A method for an associative memory array includes storing each column of a matrix in an associated column of the associative memory array, where each bit in row j of the matrix is stored in row R-matrix-row-j of the array, storing a vector in each associated column, where a bit j from the vector is stored in an R-vector-bit-j row of the array. The method includes simultaneously activating a vector-matrix pair of rows R-vector-bit-j and R-matrix-row-j to concurrently receive a result of a Boolean function on all associated columns, using the results to calculate a product between the vector-matrix pair of rows, and writing the product to an R-product-j row in the array.
    Type: Application
    Filed: March 23, 2017
    Publication date: September 28, 2017
    Inventors: Avidan Akerib, Pat Lasserre