Patents by Inventor Patrice Menard
Patrice Menard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9383807Abstract: A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain based on whether the microcontroller system has asserted a power trigger for any module in the power domain or if any module in the power domain has asserted a power keeper.Type: GrantFiled: October 1, 2013Date of Patent: July 5, 2016Assignee: Atmel CorporationInventors: Sebastien Jouin, Patrice Menard, Thierry Gourbilleau
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Patent number: 9360928Abstract: A microcontroller system includes a main voltage regulator and a low power voltage regulator having a static current consumption less than the static current consumption of the main voltage regulator. A power state controller enables the low power voltage regulator during a power saving mode. On exiting the power saving mode, the power state controller enables the main voltage regulator and disables the low power voltage regulator after determining that the main voltage regulator is ready. The switching circuitry can be asynchronous.Type: GrantFiled: August 16, 2012Date of Patent: June 7, 2016Assignee: Atmel CorporationInventors: Frode Milch Pedersen, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau, Stefan Schabel
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Patent number: 9323312Abstract: A microcontroller system includes a power manager that is configured to, during a power saving mode, configure an interrupt delaying module to receive and hold an interrupt from an interrupt source. In response to receiving the interrupt from the interrupt source, the power manager causes the microcontroller system to exit the power saving mode. Upon exiting the power saving mode, the power manager configures the interrupt delaying module to release the interrupt.Type: GrantFiled: March 8, 2013Date of Patent: April 26, 2016Assignee: Atmel CorporationInventors: Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Patent number: 9317095Abstract: A voltage scaling system can scale a supply voltage while preventing a processor from communicating with first system components that are rendered unstable from the scaling. On the other hand, the voltage scaling system allows second system components that are stable during the scaling to communicate with the processor. A processor scales a system supply voltage to a target supply voltage. The processor halts operations of the first system components and executes the instruction. When the first system components are halted, the processor cannot access the first system components. The second system components can continue operating during the scaling. A controller that saves power can configure a voltage regulator to scale the system supply voltage to the target supply voltage. Once the target supply voltage is reached, the voltage regulator sends an indication to a power management unit, after which the first system components continue to operate.Type: GrantFiled: September 13, 2012Date of Patent: April 19, 2016Assignee: Atmel CorporationInventors: Sebastien Jouin, Romain Oddoart, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Patent number: 9298237Abstract: A voltage scaling system can scale a supply voltage while preventing processor access of system components that are rendered unstable from the scaling. A processor receives an instruction to scale a system supply voltage to a target supply voltage. The processor executes the instruction and enters into a sleep mode. The processor can send, to a controller that saves power, an indication that the processor is in the sleep mode. When the processor is in the sleep mode, the processor becomes inactive and cannot access any components, e.g., Flash memory data, of the voltage scaling system. The controller can configure a voltage regulator to scale the system supply voltage to the target supply voltage. Once the target supply voltage is reached, the voltage regulator sends an interrupt to the processor, thereby waking up the processor from the sleep mode.Type: GrantFiled: September 13, 2012Date of Patent: March 29, 2016Assignee: Atmel CorporationInventors: Sebastien Jouin, Romain Oddoart, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Patent number: 9250690Abstract: A microcontroller includes I/O pins whose respective functions are configurable by an I/O controller in accordance with user-programmable input. The availability of such configurable I/O pins is extended to low-power or power savings modes of operation during which the I/O controller is powered off or deactivated.Type: GrantFiled: September 10, 2012Date of Patent: February 2, 2016Assignee: Atmel CorporationInventors: Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Patent number: 9213397Abstract: A microcontroller system can operate in a number of power modes. In response to changing from a previous mode to a present mode, the microcontroller system reads a present calibration value correspond to the present mode from system configuration storage and write the present calibration value to a configuration register for a component. A logic block for the component reads the present calibration value and calibrates the component.Type: GrantFiled: March 7, 2013Date of Patent: December 15, 2015Assignee: Atmel CorporationInventors: Sebastien Jouin, Romain Oddoart, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Patent number: 9213388Abstract: A microcontroller system includes a reset delaying module that is configured to, during a power saving mode, receive and delay a reset signal from a reset source. The reset delaying module waits for a regulator ready signal from a voltage regulator because, prior to the reset signal, the voltage regulator is in a power saving mode. In response to receiving the regulator ready signal, the reset delaying module releases the reset, e.g., to a reset controller.Type: GrantFiled: March 5, 2013Date of Patent: December 15, 2015Assignee: Atmel CorporationInventors: Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Publication number: 20150253839Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.Type: ApplicationFiled: May 20, 2015Publication date: September 10, 2015Inventors: Sebastien Jouin, Romain Oddoart, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Patent number: 9063734Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.Type: GrantFiled: September 7, 2012Date of Patent: June 23, 2015Assignee: Atmel CorporationInventors: Sebastien Jouin, Romain Oddoart, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Publication number: 20150095681Abstract: A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain based on whether the microcontroller system has asserted a power trigger for any module in the power domain or if any module in the power domain has asserted a power keeper.Type: ApplicationFiled: October 1, 2013Publication date: April 2, 2015Applicant: Atmel CorporationInventors: Sebastien Jouin, Patrice Menard, Thierry Gourbilleau
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Publication number: 20150067363Abstract: A clock generator circuit for an integrated circuit (IC) component (e.g., a microcontroller unit) is disclosed that provides an automatic sleep mode for modules of the IC component. In some implementations, the clock generator circuit provides a simplified user interface and low power consumption by implementing one sleep mode level and allowing modules in the IC to start and stop internal clocks dynamically on demand. In active mode, the power consumption can be reduced to a minimum by turning off clocks for unused modules.Type: ApplicationFiled: September 4, 2013Publication date: March 5, 2015Inventors: Sebastien JOUIN, Patrice MENARD, Thierry GOURBILLEAU, Estelle FAZILLEAU
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Publication number: 20140266333Abstract: A clock generation system for an integrated circuit (IC) chip (e.g., a microcontroller) is disclosed that allows digital blocks and other components in the IC chip to start and stop internal clocks dynamically on demand to reduce power consumption.Type: ApplicationFiled: March 12, 2013Publication date: September 18, 2014Inventors: Sebastien Jouin, Patrice Menard, Thierry Gourbilleau, Yann Le Floch, Mohamed Aichouchi
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Publication number: 20140089707Abstract: A microcontroller system can operate in a number of power modes. In response to changing from a previous mode to a present mode, the microcontroller system reads a present calibration value correspond to the present mode from system configuration storage and write the present calibration value to a configuration register for a component. A logic block for the component reads the present calibration value and calibrates the component.Type: ApplicationFiled: March 7, 2013Publication date: March 27, 2014Applicant: Atmel CorporationInventors: Sebastien Jouin, Romain Oddoart, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Publication number: 20140089706Abstract: A microcontroller system includes a reset delaying module that is configured to, during a power saving mode, receive and delay a reset signal from a reset source. The reset delaying module waits for a regulator ready signal from a voltage regulator because, prior to the reset signal, the voltage regulator is in a power saving mode. In response to receiving the regulator ready signal, the reset delaying module releases the reset, e.g., to a reset controller.Type: ApplicationFiled: March 5, 2013Publication date: March 27, 2014Applicant: Atmel CorporationInventors: Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Publication number: 20140089714Abstract: A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain in response to event from an event generating module without activating a processor of the microcontroller system.Type: ApplicationFiled: March 5, 2013Publication date: March 27, 2014Applicant: Atmel CorporationInventors: Frode Milch Pedersen, Ronan Barzic, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau, Morten Werner Lund
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Publication number: 20140089708Abstract: A microcontroller system includes a power manager that is configured to, during a power saving mode, configure an interrupt delaying module to receive and hold an interrupt from an interrupt source. In response to receiving the interrupt from the interrupt source, the power manager causes the microcontroller system to exit the power saving mode. Upon exiting the power saving mode, the power manager configures the interrupt delaying module to release the interrupt.Type: ApplicationFiled: March 8, 2013Publication date: March 27, 2014Applicant: Atmel CorporationInventors: Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Publication number: 20140075231Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.Type: ApplicationFiled: September 7, 2012Publication date: March 13, 2014Applicant: ATMEL CORPORATIONInventors: Sebastien Jouin, Romain Oddoart, Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Publication number: 20140075066Abstract: A microcontroller includes I/O pins whose respective functions are configurable by an I/O controller in accordance with user-programmable input. The availability of such configurable I/O pins is extended to low-power or power savings modes of operation during which the I/O controller is powered off or deactivated.Type: ApplicationFiled: September 10, 2012Publication date: March 13, 2014Applicant: ATMEL CORPORATIONInventors: Patrice Menard, Mickael Le Dily, Thierry Gourbilleau
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Publication number: 20140028384Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.Type: ApplicationFiled: September 4, 2012Publication date: January 30, 2014Applicant: ATMEL CORPORATIONInventors: Patrice Menard, Olivier Husson, Mickael Le Dily, Thierry Gourbilleau, Marc Laurent, Stefan Schabel, Ronan Barzic