Patents by Inventor Patricia Beauregard Smith

Patricia Beauregard Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7910936
    Abstract: A method of forming a semiconductor device including forming a low-k dielectric material over a substrate, depositing a liner on a portion of the low-k dielectric material, and exposing the liner to a plasma. The method also includes depositing a layer over the liner.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: March 22, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Sameer Kumar Ajmera, Patricia Beauregard Smith, Changming Jin
  • Publication number: 20090115030
    Abstract: A method of forming a semiconductor device including forming a low-k dielectric material over a substrate, depositing a liner on a portion of the low-k dielectric material, and exposing the liner to a plasma. The method also includes depositing a layer over the liner.
    Type: Application
    Filed: December 9, 2008
    Publication date: May 7, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Sameer Kumar Ajmera, Patricia Beauregard Smith, Changming Jin
  • Patent number: 7476602
    Abstract: A method of forming a semiconductor device including forming a low-k dielectric material over a substrate, depositing a liner on a portion of the low-k dielectric material, and exposing the liner to a plasma. The method also includes depositing a layer over the liner.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: January 13, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Sameer Kumar Ajmera, Patricia Beauregard Smith, Changming Jin
  • Patent number: 7413994
    Abstract: The present invention provides a photoresist removal process and a method for manufacturing an interconnect using the same. One embodiment of the photoresist removal process includes, among other steps, providing a low dielectric constant (k) substrate having a photoresist layer located thereover, and removing the photoresist layer using a plasma which incorporates a gas which includes hydrogen or deuterium and a small amount of oxygen less than about 20 volume percent of the gas. Another embodiment of the photoresist removal process includes, among other steps, providing a low dielectric constant (k) substrate having a photoresist layer located thereover, removing a bulk portion of the photoresist layer using a plasma which incorporates a gas which includes hydrogen or deuterium, and removing a small portion of the photoresist layer using a plasma which incorporates a gas which includes oxygen, wherein the order of the two removing steps is interchangeable.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: August 19, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Patricia Beauregard Smith, Laura M. Matz, Vinay Shah
  • Patent number: 7101788
    Abstract: A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (102), forming a dielectric layer (104) over the semiconductor substrate (102), and etching a trench structure (106) or a via structure (106) in the dielectric layer (104) to expose a portion of a surface of the semiconductor substrate (102). The method also includes the steps of treating a surface (104a) of the dielectric layer (104) with an adhesion solution, such as a reactive plasma including hydrogen, and forming a diffusion barrier layer (110) over the dielectric layer (104). Moreover, the adhesion solution chemically interacts with the surface (104a) of the dielectric layer (104) and enhances or increases adhesion between dielectric layer (104) and diffusion barrier layer (110).
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: September 5, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Patricia Beauregard Smith, Jiong-Ping Lu
  • Patent number: 6713402
    Abstract: Cleaning methods are disclosed for removing sidewall polymers from interconnect vias or trenches, wherein a wafer is exposed to a plasma comprising hydrogen and an inert gas in a plasma cleaning chamber following etch-stop etching.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: March 30, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Patricia Beauregard Smith, Heungsoo Park
  • Publication number: 20030224595
    Abstract: Cleaning methods are disclosed for removing sidewall polymers from interconnect vias or trenches, wherein a wafer is exposed to a plasma comprising hydrogen and an inert gas in a plasma cleaning chamber following etch-stop etching.
    Type: Application
    Filed: May 31, 2002
    Publication date: December 4, 2003
    Inventors: Patricia Beauregard Smith, Heungsoo Park
  • Publication number: 20030162384
    Abstract: A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (102), forming a dielectric layer (104) over the semiconductor substrate (102), and etching a trench structure (106) or a via structure (106) in the dielectric layer (104) to expose a portion of a surface of the semiconductor substrate (102). The method also includes the steps of treating a surface (104a) of the dielectric layer (104) with an adhesion solution, such as a reactive plasma including hydrogen, and forming a diffusion barrier layer (110) over the dielectric layer (104). Moreover, the adhesion solution chemically interacts with the surface (104a) of the dielectric layer (104) and enhances or increases adhesion between dielectric layer (104) and diffusion barrier layer (110).
    Type: Application
    Filed: January 14, 2003
    Publication date: August 28, 2003
    Inventors: Patricia Beauregard Smith, Jiong-Ping Lu