Abstract: A graphics system includes a single buffer coupled between a graphics controller and a display controller. The graphics controller rotates a frame generated by an application and writes the rotated frame into the buffer. The rotation is performed a segment (e.g., a quartile of a frame) at a time. Each time the display controller completes displaying a frame quartile, the display controller signals the graphics controller to rotate a corresponding quartile of a next frame. The reduction in buffer space reduces power consumption and improves performance of the system.

Abstract: Briefly, in accordance with an embodiment of the invention, a method and apparatus to write data is provided. The apparatus may include a circuit to deassert a chip select signal to latch data in a first memory after asserting a write enable signal and prior to deasserting the write enable signal, wherein the chip select signal is coupled to the first memory and the write enable signal is coupled to both the first memory and a second memory. The method may include asserting a chip select signal after asserting of a write enable signal and then deasserting the chip select signal to latch the data in a memory, wherein the deasserting of the chip select signal occurs prior to the deasserting of the write enable signal. Other embodiments are described and claimed.