Patents by Inventor Patrick A. Bolen

Patrick A. Bolen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210303396
    Abstract: A distributed RAID storage-device-assisted data rebuild system includes a first RAID data storage device, provided in response to data unavailability, that retrieves respective first data for a first data stripe from each of the other RAID data storage devices, performs an XOR operation on the respective first data to generate first rebuilt data for the first data stripe, and stores the first rebuilt data as part of the first data stripe. A second RAID data storage device retrieves respective second data for a second data stripe from third RAID data storage devices, performs an XOR operation on the respective second data and third data for the second data stripe stored on the second RAID data storage device to generate second rebuilt data for the second data stripe, and provides the second rebuilt data for storage on the first RAID data storage device as part of the second data stripe.
    Type: Application
    Filed: March 25, 2020
    Publication date: September 30, 2021
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Publication number: 20210294496
    Abstract: A data mirroring system includes a primary computing device with a primary memory system, a primary storage system, and a primary communication system. The primary computing device writes data to the primary memory system, copies the data from the primary memory system to the primary storage system, and transmits the data using the primary communication system. A secondary computing device is coupled to the primary computing device, includes a secondary memory system, a secondary storage system having a secondary buffer subsystem and a secondary storage subsystem, and a secondary communication system. The secondary computing system receives the data at the secondary communication system, performs a remote direct memory access operation to write the data to the secondary buffer subsystem such that the data is not stored in the secondary memory system, and copies the data from the secondary buffer subsystem to the secondary storage subsystem.
    Type: Application
    Filed: March 18, 2020
    Publication date: September 23, 2021
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Patent number: 11106607
    Abstract: A NUMA-aware storage system including a first processing subsystem coupled to a first memory subsystem, and a second processing subsystem coupled to a second memory subsystem. A first NTB subsystem connected to the first processing subsystem presents itself as a first storage device, identifies first data transfer operations directed to the first memory subsystem and, in response, claims those first data transfer operations and provides them directly to the first processing subsystem. A second NTB subsystem connected to the second processing subsystem presents itself as a second storage device, identifies second data transfer operations directed to the second memory subsystem and, in response, claims those second data transfer operations and provides them directly to the second processing subsystem. A storage controller system receives a command from either the first or second processing subsystem via the first or second NTB subsystem and, in response, transmits that command to a storage system.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: August 31, 2021
    Assignee: Dell Products L.P.
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Publication number: 20210255924
    Abstract: A RAID storage-device-assisted deferred parity data update system includes a RAID primary data drive that retrieves second primary data via a DMA operation from host system, and XOR's it with first primary data to produce first interim parity data, which causes a RAID storage controller device to provide an inconsistent parity stripe journal entry in the host system. The RAID primary data drive then retrieves third primary data via a DMA operation from the host system, XORs it with the second primary data and the first interim parity data to produce second interim parity data. A RAID parity data drive retrieves the second interim parity data via a DMA operation, and XORs it with first parity data to produce second parity data that it uses to overwrite the first parity data, which causes the RAID storage controller device to remove the inconsistent parity stripe journal entry from the host system.
    Type: Application
    Filed: May 5, 2021
    Publication date: August 19, 2021
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Patent number: 11093329
    Abstract: A RAID proxy storage-device-assisted data update system includes a RAID parity data storage device and a first RAID primary data storage device without storage-device-assisted data update functionality, and a second RAID primary data storage device with storage-device-assisted data update functionality. The second RAID primary data storage device receives a command that identifies updated primary data for the first RAID primary data storage device and, in response, retrieves the updated primary data, current primary data from the first RAID primary data storage device, and current parity data from the RAID primary parity data storage device. The second RAID primary data storage device performs an XOR operation using the updated primary data, the current primary data, and the current parity data to generate updated parity data, transmits the updated primary data to the first RAID primary data storage device, and transmits the updated parity data to the RAID parity data storage device.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: August 17, 2021
    Assignee: Dell Products L.P.
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Patent number: 11093175
    Abstract: A RAID data storage device direct communication system includes a first RAID data storage device that includes a first RAID data storage device controller having a first RAID data storage device function providing a second RAID data storage device submission queue in a first RAID data storage device memory subsystem, and a second RAID data storage device that includes a second RAID data storage device controller having a second RAID data storage device function providing a second RAID data storage device completion queue in a second RAID data storage device memory subsystem. The second RAID data storage device generates a command, transmits the command directly to first RAID data storage device and in the second RAID data storage device submission queue, and receives a completion message that is associated with the command directly from the first RAID data storage device and in the second RAID data storage device completion queue.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: August 17, 2021
    Assignee: Dell Products L.P.
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Publication number: 20210240564
    Abstract: A RAID storage controller storage-device-assisted data update system includes a RAID storage controller device coupled to a host system and RAID storage devices in a “look aside” RAID storage controller device configuration. Based on command(s) from the RAID storage controller device, a first RAID primary data storage device may perform a first DMA operation to access first primary data stored on the host system, and write the first primary data to its first buffer subsystem. The first RAID primary data storage device may then perform a first XOR operation using the first primary data stored in its first buffer subsystem and second primary data stored in its first storage subsystem in order to produce first interim parity data, and write the first interim parity data to its second buffer subsystem. The first RAID primary data storage device may then update the second primary data with the first primary data.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 5, 2021
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Patent number: 11023313
    Abstract: A RAID storage controller storage-device-assisted data update system includes a RAID storage controller device coupled to a host system and RAID storage devices in a “look aside” RAID storage controller device configuration. Based on command(s) from the RAID storage controller device, a first RAID primary data storage device may perform a first DMA operation to access first primary data stored on the host system, and write the first primary data to its first buffer subsystem. The first RAID primary data storage device may then perform a first XOR operation using the first primary data stored in its first buffer subsystem and second primary data stored in its first storage subsystem in order to produce first interim parity data, and write the first interim parity data to its second buffer subsystem. The first RAID primary data storage device may then update the second primary data with the first primary data.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: June 1, 2021
    Assignee: Dell Products L.P.
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Patent number: 11023321
    Abstract: A RAID storage-device-assisted deferred parity data update system includes a RAID primary data drive that retrieves second primary data via a DMA operation from host system, and XOR's it with first primary data to produce first interim parity data, which causes a RAID storage controller device to provide an inconsistent parity stripe journal entry in the host system. The RAID primary data drive then retrieves third primary data via a DMA operation from the host system, XORs it with the second primary data and the first interim parity data to produce second interim parity data. A RAID parity data drive retrieves the second interim parity data via a DMA operation, and XORs it with first parity data to produce second parity data that it uses to overwrite the first parity data, which causes the RAID storage controller device to remove the inconsistent parity stripe journal entry from the host system.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: June 1, 2021
    Assignee: Dell Products L.P.
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Publication number: 20210096767
    Abstract: A RAID storage-device-assisted data update system includes a RAID storage controller coupled to first RAID storage devices each including respective first RAID storage subsystems. Each first RAID storage devices receives a command from the RAID storage controller that identifies a second RAID buffer subsystem as a target memory location and, in response, retrieves respective first RAID storage device data from its respective first RAID storage subsystem and performs DMA operations to provide that first RAID storage device data on the second RAID buffer subsystem. A second RAID storage device that includes the second RAID buffer subsystem and a second RAID storage subsystem receives a command from the RAID storage controller and, in response, performs an XOR operation using the first RAID storage device data in the second RAID buffer subsystem to produce update data that it stores in its second RAID storage subsystem.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 1, 2021
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Publication number: 20210096950
    Abstract: A RAID storage-device-assisted deferred parity data update system includes a RAID primary data drive that retrieves second primary data via a DMA operation from host system, and XOR's it with first primary data to produce first interim parity data, which causes a RAID storage controller device to provide an inconsistent parity stripe journal entry in the host system. The RAID primary data drive then retrieves third primary data via a DMA operation from the host system, XORs it with the second primary data and the first interim parity data to produce second interim parity data. A RAID parity data drive retrieves the second interim parity data via a DMA operation, and XORs it with first parity data to produce second parity data that it uses to overwrite the first parity data, which causes the RAID storage controller device to remove the inconsistent parity stripe journal entry from the host system.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 1, 2021
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Publication number: 20210096780
    Abstract: A RAID storage multi-step command system includes a RAID storage system coupled to a RAID storage controller device. The RAID storage controller device identifies a RAID storage system configuration of the RAID storage system and, based on the RAID storage system configuration, generates a first multi-step command definition file for a first RAID storage device in the RAID storage system, and transmits it to the first RAID storage device. The first multi-step command definition file defines first steps that each include first operation(s). Subsequent to transmitting the first multi-step command definition file, the RAID storage controller device generates a first multi-step command that references the first multi-step command definition file and includes first parameter(s) for use in performing each first operation(s) included in the first steps defined by the first multi-step command definition file, and transmits the first multi-step command to the first RAID storage device.
    Type: Application
    Filed: March 27, 2020
    Publication date: April 1, 2021
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Publication number: 20210096945
    Abstract: A RAID storage controller storage-device-assisted data update system includes a RAID storage controller device coupled to a host system and RAID storage devices in a “look aside” RAID storage controller device configuration. Based on command(s) from the RAID storage controller device, a first RAID primary data storage device may perform a first DMA operation to access first primary data stored on the host system, and write the first primary data to its first buffer subsystem. The first RAID primary data storage device may then perform a first XOR operation using the first primary data stored in its first buffer subsystem and second primary data stored in its first storage subsystem in order to produce first interim parity data, and write the first interim parity data to its second buffer subsystem. The first RAID primary data storage device may then update the second primary data with the first primary data.
    Type: Application
    Filed: March 9, 2020
    Publication date: April 1, 2021
    Inventors: Gary Benedict Kotzur, William Emmett Lynn, Kevin Thomas Marks, Chandrashekar Nelogal, James Peter Giannoules, Austin Patrick Bolen
  • Publication number: 20210081349
    Abstract: A hot-plugged PCIe device configuration system includes a PCIe device with a PCIe configuration space having PCIe configuration space registers. A computing system includes a PCIe connector and a PCIe setting record database storing a first PCIe setting record having a first register write location value and first register value information. The computing system detects that the PCIe device has been hot-plugged into the PCIe connector, and uses the first register write location value in the first PCIe setting record to determine a location in the PCIe configuration space that provides a first PCIe configuration space register. The computing system then uses the first register value information in the first PCIe setting record to determine at least one register value change for the first PCIe configuration register, and writes the at least one register value change to the first PCIe configuration space register using the location.
    Type: Application
    Filed: November 24, 2020
    Publication date: March 18, 2021
    Inventors: Austin Patrick Bolen, Vijay Bharat Nijhawan
  • Patent number: 10853299
    Abstract: A hot-plugged PCIe device configuration system includes a PCIe device with a PCIe configuration space having PCIe configuration space registers. A computing system includes a PCIe connector and a PCIe setting record database storing a first PCIe setting record having a first register write location value and first register value information. The computing system detects that the PCIe device has been hot-plugged into the PCIe connector, and uses the first register write location value in the first PCIe setting record to determine a location in the PCIe configuration space that provides a first PCIe configuration space register. The computing system then uses the first register value information in the first PCIe setting record to determine at least one register value change for the first PCIe configuration register, and writes the at least one register value change to the first PCIe configuration space register using the location.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: December 1, 2020
    Assignee: Dell Products L.P.
    Inventors: Austin Patrick Bolen, Vijay Bharat Nijhawan
  • Patent number: 10824574
    Abstract: A multi-port storage device multi-socket memory access system includes a plurality of processing subsystems interconnected by at least one processing subsystem interconnect, a respective local memory subsystem for each of the processing subsystems, and a storage system that provides a respective connection to each of the processing subsystems. The storage system receives a memory access command and uses it to determine a first local memory subsystem that includes a memory location that is identified in the memory access command. The storage system then uses a connection mapping to identify a first connection to a first processing subsystem for which the first local memory subsystem is provided. The storage system then accesses the first memory subsystem through the first connection, via the first processing system, and without utilizing the at least one processing subsystem interconnect, in order to execute the memory access command.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: November 3, 2020
    Assignee: Dell Products L.P.
    Inventors: Kevin Thomas Marks, Austin Patrick Bolen, William Price Dawkins, William Emmett Lynn, Gary Benedict Kotzur, Robert W. Hormuth
  • Publication number: 20200301857
    Abstract: A multi-port storage device multi-socket memory access system includes a plurality of processing subsystems interconnected by at least one processing subsystem interconnect, a respective local memory subsystem for each of the processing subsystems, and a storage system that provides a respective connection to each of the processing subsystems. The storage system receives a memory access command and uses it to determine a first local memory subsystem that includes a memory location that is identified in the memory access command. The storage system then uses a connection mapping to identify a first connection to a first processing subsystem for which the first local memory subsystem is provided. The storage system then accesses the first memory subsystem through the first connection, via the first processing system, and without utilizing the at least one processing subsystem interconnect, in order to execute the memory access command.
    Type: Application
    Filed: March 22, 2019
    Publication date: September 24, 2020
    Inventors: Kevin Thomas Marks, Austin Patrick Bolen, William Price Dawkins, William Emmett Lynn, Gary Benedict Kotzur, Robert W. Hormuth
  • Patent number: 10740035
    Abstract: Methods, systems, and computer programs encoded on computer storage medium, for determining a unique identifier and a firmware version of each device; updating a cache storage to store the unique identifier and the firmware version for each device; generating, for a particular device, a command that is to be performed at the particular device; accessing the cache storage to identify the cached unique identifier and the cached firmware version for the particular device; transmitting, to a device driver or the particular device, the command and data indicating the cached unique identifier and the cached firmware version for the particular device; determining, by the device driver or the particular device, that i) the cached unique identifier matches a current unique identifier for the particular device and ii) the cached firmware version matches a current firmware version for the particular device; and completing the command at the particular device.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: August 11, 2020
    Assignee: Dell Products L.P.
    Inventors: Christopher Domingo Arzola, Austin Patrick Bolen, Hahn Norden
  • Publication number: 20190087376
    Abstract: A hot-plugged PCIe device configuration system includes a PCIe device with a PCIe configuration space having PCIe configuration space registers. A computing system includes a PCIe connector and a PCIe setting record database storing a first PCIe setting record having a first register write location value and first register value information. The computing system detects that the PCIe device has been hot-plugged into the PCIe connector, and uses the first register write location value in the first PCIe setting record to determine a location in the PCIe configuration space that provides a first PCIe configuration space register. The computing system then uses the first register value information in the first PCIe setting record to determine at least one register value change for the first PCIe configuration register, and writes the at least one register value change to the first PCIe configuration space register using the location.
    Type: Application
    Filed: September 15, 2017
    Publication date: March 21, 2019
    Inventors: Austin Patrick Bolen, Vijay Bharnt Nijhawan
  • Patent number: 8880747
    Abstract: An endpoint device discovery system includes a downstream port. A register is coupled to the downstream port. An endpoint ready status bit may be set in the register in response to an endpoint ready message received at the downstream port. A non-transitory computer-readable medium is coupled to the register and includes computer-readable instructions that, when executed by a processor, cause the processor to determine that the endpoint ready status bit is set and, in response, configure an endpoint device that is coupled to the downstream port. The endpoint device discovery system may be included in an information handling system (IHS) in order to provide for discovery of endpoint devices that are coupled to the IHS as soon as those endpoint devices have initialized.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: November 4, 2014
    Assignee: Dell Products, L.P.
    Inventor: Austin Patrick Bolen