Patents by Inventor Patrick A. Halahan

Patrick A. Halahan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
    Patent number: 7521360
    Abstract: A through hole (114) is formed in a wafer (104) comprising a semiconductor substrate (110). A seed layer (610) is sputtered on the bottom surface of the wafer. The seed is not deposited over the through hole's sidewalls adjacent the top surface of the wafer. A conductor (810) is electroplated into the through hole. In another embodiment, a seed is deposited into an opening in a wafer through a dry film resist mask (1110). The dry film resist overhangs the edges of the opening, so the seed is not deposited over the opening's sidewalls adjacent the top surface of the wafer. In another embodiment, a dielectric (120) is formed in an opening in a semiconductor substrate (110) by a non-conformal physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls but not the bottom of the opening. A seed (610) is formed on the bottom by electroless plating. A conductor (810) is electroplated on the seed.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: April 21, 2009
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Patrick A. Halahan, Sam Kao, Bosco Lan, Sergey Savastiouk, Oleg Siniaguine
  • Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
    Patent number: 6897148
    Abstract: A through hole (114) is formed in a wafer (104) comprising a semiconductor substrate (110). A seed layer (610) is sputtered on the bottom surface of the wafer. The seed is not deposited over the through hole's sidewalls adjacent the top surface of the wafer. A conductor (810) is electroplated into the through hole. In another embodiment, a seed is deposited into an opening in a wafer through a dry film resist mask (1110). The dry film resist overhangs the edges of the opening, so the seed is not deposited over the opening's sidewalls adjacent the top surface of the wafer. In another embodiment, a dielectric (120) is formed in an opening in a semiconductor substrate (110) by a non-conformal physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls but not the bottom of the opening. A seed (610) is formed on the bottom by electroless plating. A conductor (810) is electroplated on the seed.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: May 24, 2005
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Patrick A. Halahan, Sam Kao, Bosco Lan, Sergey Savastiouk, Oleg Siniaguine
  • Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
    Publication number: 20040203224
    Abstract: A through hole (114) is formed in a wafer (104) comprising a semiconductor substrate (110). A seed layer (610) is sputtered on the bottom surface of the wafer. The seed is not deposited over the through hole's sidewalls adjacent the top surface of the wafer. A conductor (810) is electroplated into the through hole. In another embodiment, a seed is deposited into an opening in a wafer through a dry film resist mask (1110). The dry film resist overhangs the edges of the opening, so the seed is not deposited over the opening's sidewalls adjacent the top surface of the wafer. In another embodiment, a dielectric (120) is formed in an opening in a semiconductor substrate (110) by a non-conformal physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls but not the bottom of the opening. A seed (610) is formed on the bottom by electroless plating. A conductor (810) is electroplated on the seed.
    Type: Application
    Filed: April 9, 2003
    Publication date: October 14, 2004
    Inventors: Patrick A. Halahan, Sam Kao, Bosco Lan, Sergey Savastiouk, Oleg Siniaguine