Abstract: A computer-implemented method, apparatus, and computer program product are disclosed for migrating data from a source physical page to a destination physical page. A migration process is begun to migrate data from the source physical page to the destination physical page which causes a host bridge to enter a first state. The host bridge then suspends processing of direct memory access operations when the host bridge is in the first state. The data is migrated from the source physical page to the destination physical page while the host bridge is in the first state.

Abstract: Method, apparatus and system for controlling input/output adapter data flow operations in a data processing system that includes at least one of a traffic class mechanism in conjunction with virtual channel resources so as to be able to associate Load/Store and DMA flows to/from an input/output adapter, and a relaxed ordering mechanism for associating a relaxed ordering bit to Load/Store operations to an input/output adapter. Functionality for controlling the input/output adapter data flow is provided in a host bridge that connects the input/output adapter to a system bus of the data processing system.

Abstract: A SCSI adapter uses firmware to provide functionality of a SCSI enclosure services device. In a preferred embodiment, a SCSI adapter communicates with a backplane via I2C IO ports on both the adapter and the backplane. The I2C IO ports of the adapter and backplane are connected via wires of the SCSI connection. Commands sent by applications to the enclosure services device are responded to by the virtual enclosure device. The process is preferably transparent to calling applications.

Abstract: The present invention generally is directed to an apparatus for holding one or more devices, comprising a rack. The rack includes one or more devices in which at least one device has a microcontroller. The rack further includes a device memory associated with each device containing a unique identifier. The microcontroller is connected to the device memory through a bus. The microcontroller is configured to retrieve the unique identifier.

Abstract: A method and apparatus are provided for implementing peripheral component interconnect (PCI) combining function for PCI bridges. A programmable boundary for a combined operation is selected. A write request is received. Responsive to the write request, checking for a combined operation hit is performed. Responsive to an identified combined operation hit, a combined operation is accepted. Checking for the selected programmable boundary for the combined operation is performed. Responsive to identifying the programmable boundary for the combined operation, the combined operation is launched to a destination bus. A programmable timer is identified for the combined operation. Responsive to the programmable timer expiring, the combined operation is launched to a destination bus.

Abstract: In an electrical system having a connector board with at least one electrical connector thereon for receiving an electrical device therein, volumetric vital product parametric data is stored in memory associated with the connector board. The stored volumetric vital product parametric data can be accessed with the electrical system to check for available space for a proposed electrical device, for example. The stored data may include information about dimensional characteristics of the connector board and the at least one electrical connector. This data can be compared with corresponding data for the electrical device to determine compatibility, for example.

Abstract: The present invention includes a driving circuit and method for driving signals. An input signal is received by the driving circuit on an input signal line which is connected to a bias circuit for a common voltage level. Two output lines from the driving circuit are driven to the receiver which is capable of using differential output lines or a selected single ended output line. Furthermore, the output lines may be driven to a high impedance selected by the voltage level of the input signal. The receiver of the output lines may be a SCSI device using multimode terminators which include low voltage differential and a single ended mode.

Abstract: The present invention includes a driving circuit and method for driving signals. An input signal is received by the driving circuit on an input signal line which is connected to a bias circuit for a common voltage level. Two output lines from the driving circuit are driven to the receiver which is capable of using differential output lines or a selected single ended output line. Furthermore, the output lines may be driven to a high impedance selected by the voltage level of the input signal. The receiver of the output lines may be a SCSI device using multimode terminators which include low voltage differential and a single ended mode.

Abstract: The system I/O interface and its data structure are designed to minimize the host CPU utilization in driving an adapter. The interface is also designed to reduce the system interference in processing I/O requests. To eliminate the need of using PIO instructions, the command/status blocks for exchanging messages between the system and the adapter reside in the system memory. The data structure is designed to avoid "share write" entries in order to further minimize the overhead of maintaining each coherency when updating an entry in the cache either concurrently or sequentially by both adapter and system CPU. Further, the data structure of the control and status blocks is resided in the system memory. The system CPU uses STORE instruction to prepare control blocks and LOAD instruction to read from completion status blocks; while the adapter will rely on its DMA engine to move data to/from system memory in accessing control/status blocks.

Abstract: A computer system is provided which supports an increase in the number of pluggable cards on the secondary I/O bus by using driver/receiver modules and direction control logic in place of more complex and more expensive bus to bus bridges. The number of pluggable cards on the I/O bus in a computer system is limited by the electrical loading of each card and the frequency of operations on the bus. Reducing the bus frequency provides more signal propagation time. The added signal propagation time supports the extension of the bus by driver/receiver modules and logic which controls the direction the driver/receiver modules drive the bus signals. Further, the driver/receiver modules support changing the hardware configuration of the system by adding or removing an I/O card without the need to cease data processing activity for the entire computer.

Abstract: As SCSI systems increase in size, especially where there are a plurality of physically separate components, cables are often used to connect various components of the system, such as drives, to one another via repeaters and convertors. Unfortunately, as the length of the connecting cable increases, the cable in combination with the repeaters and convertors skew the signals and data passed between the components. A method and system is presented that reclocks the skewed data and signals so as to compensate for the skewing. The method and system accomplishes this task dynamically for Fast and Fast 20 modes of operation of the SCSI bus.

Abstract: The present invention provides a computer system which allows a user to identify which one of a plurality of feature cards has issued an error signal. The device issuing the error signal is then isolated and error recovery techniques, (or re-initialization) are implemented only on the device with the error condition. The computer system includes additional control logic, along with a bridge chip that interconnects different information buses and at least one connector slot for receiving a feature card, which implements specific functions such as I/O, memory, or the like. When it is determined that an error signal is present the system hardware activates and holds a reset signal to the device which issued the error signal. Additionally, a status bit in a register in the bridge chip is set.

Abstract: Described is a technique for transferring data between a device controller and a device in a data storage subsystem. The controller has a data buffer through which passes data being transferred to and from the device. The controller communicates with the device by means of low level multi sector Read/Write orders and the data requested by the controller is transferred between device and controller in the form of 32, 64 or 128 byte packets. The device has a relatively small data buffer which can store one packet of data at a time. While one order is executing on the device, the controller is able to issue subsequent orders. One of these orders is an EXTEND order which orders the device to continue reading beyond the data specified in the read order currently executing on the device. The EXTEND order also allows implementation of `back to back` writes.

Abstract: A computer system is provided which allows a user to remove or install feature cards without removing the cover to entire computer. A computer cover is provided with rectangular openings which correspond in alignment and size to an electrical connector on the system board. The feature card can then be mechanically attached to the computer cover, or a frame member, with a pivot and guide member. A handle is provided which will allow the user to apply pressure to the card, via the guide member in order to insert or remove the feature card from the connector on the system board. The guide member is constructed such that a vertical force is applied between the card and connector to ensure proper alignment when inserting and removing the adapter card.