Abstract: An integrated circuit including a first passive component of capacitive, resistive, or inductive type, including: a plurality of second and third passive components of said type, each having a same first theoretical value Compu_t, the second components being connected together so that their values add, and each third component being associated with a first switch having its state determining whether the value of the third component adds to the values of the second components; and a plurality of fourth passive components of said type, each associated with a second switch having its state determining whether the value of the fourth component adds to the values of the second components, at least one of the fourth passive components having a second theoretical value equal to (1?P).Compu_t or to (1+P).Compu_t, P being positive and smaller than ½.

Abstract: An integrated circuit including a first passive component of capacitive, resistive, or inductive type, including: a plurality of second and third passive components of said type, each having a same first theoretical value Compu_t, the second components being connected together so that their values add, and each third component being associated with a first switch having its state determining whether the value of the third component adds to the values of the second components; and a plurality of fourth passive components of said type, each associated with a second switch having its state determining whether the value of the fourth component adds to the values of the second components, at least one of the fourth passive components having a second theoretical value equal to (1?P).Compu_t or to (1+P).Compu_t, P being positive and smaller than ½.

Abstract: An electronic circuit includes at least one first multi-gate transistor including a first gate and a second gate different from the first gate; and a regulation unit designed to measure a variable representing the drain-source voltage of the first transistor and to apply a polarization potential as a function of the variable to the second gate of the first transistor.

Abstract: An electronic circuit includes at least one first multi-gate transistor including a first gate and a second gate different from the first gate; and a regulation unit designed to measure a variable representing the drain-source voltage of the first transistor and to apply a polarization potential as a function of the variable to the second gate of the first transistor.

Abstract: An RF receiver comprises a down-converting and sampling circuit (104) adapted to: receive an RF input signal (RFIN) having a signal band (BWRF) comprising a plurality of sub-bands (BWIF), each sub-band comprising a plurality (2K) of channels separated by frequency channel spaces (?fCH); and perform frequency transposition and sampling to generate a discrete time signal in which a selected one of the plurality of sub-bands is brought from an initial frequency band to a lower frequency band (IF20±K?fCH); and a discrete time filter (108) having a variable pass band, the central frequency (f0) of the discrete time filter being controllable to select any one of the plurality (2K) of channels of the selected sub-band.

Abstract: The invention concerns an RF receiver comprising: a down-converting and sampling circuit (104) adapted to: receive an RF input signal (RFIN) having a signal band (BWRF) comprising a plurality of sub-bands (BWIF), each sub-band comprising a plurality (2K) of channels separated by frequency channel spaces (?fCH); and perform frequency transposition and sampling to generate a discrete time signal in which a selected one of the plurality of sub-bands is brought from an initial frequency band to a lower frequency band (IF20±K?fCH); and a discrete time filter (108) having a variable pass band, the central frequency (f0) of the discrete time filter being controllable to select any one of the plurality (2K) of channels of the selected sub-band.

Abstract: The invention relates to controlling a device for converting charge into voltage comprising an amplifier and at least one capacitor mounted in inverse feedback between an input and an output of said amplifier, whereby said amplifier can be connected between at least one input stage, to receive a charge therefrom, and at least one output stage to deliver voltage thereto, said voltage being representative of the charge received at the input, said method comprising at least one phase comprising the voltage conversion of a charge received at the input. According to the invention the conversion phase comprises at least: one first sub-phase during which the amplifier is connected to the input stage and the amplifier is disconnected from the output stage; followed, by a second sub-phase during which the amplifier is disconnected from the input stage and the amplifier is connected to the output stage.

Abstract: The invention relates to controlling a device for converting charge into voltage comprising an amplifier and at least one capacitor mounted in inverse feedback between an input and an output of said amplifier, whereby said amplifier can be connected between at least one input stage, to receive a charge therefrom, and at least one output stage to deliver voltage thereto, said voltage being representative of the charge received at the input, said method comprising at least one phase comprising the voltage conversion of a charge received at the input. According to the invention the conversion phase comprises at least: one first sub-phase during which the amplifier is connected to the input stage and the amplifier is disconnected from the output stage; followed, by a second sub-phase during which the amplifier is disconnected from the input stage and the amplifier is connected to the output stage.

Abstract: The invention relates to controlling a device for converting charge into voltage comprising an amplifier and at least one capacitor mounted in inverse feedback between an input and an output of said amplifier, whereby said amplifier can be connected between at least one input stage, to receive a charge therefrom, and at least one output stage to deliver voltage thereto, said voltage being representative of the charge received at the input, said method comprising at least one phase comprising the voltage conversion of a charge received at the input. According to the invention the conversion phase comprises at least: one first sub-phase during which the amplifier is connected to the input stage and the amplifier is disconnected from the output stage; followed, by a second sub-phase during which the amplifier is disconnected from the input stage and the amplifier is connected to the output stage.

Abstract: The invention relates to controlling a device for converting charge into voltage comprising an amplifier and at least one capacitor mounted in inverse feedback between an input and an output of said amplifier, whereby said amplifier can be connected between at least one input stage, to receive a charge therefrom, and at least one output stage to deliver voltage thereto, said voltage being representative of the charge received at the input, said method comprising at least one phase comprising the voltage conversion of a charge received at the input. According to the invention the conversion phase comprises at least: one first sub-phase during which the amplifier is connected to the input stage and the amplifier is disconnected from the output stage; followed, by a second sub-phase during which the amplifier is disconnected from the input stage and the amplifier is connected to the output stage.

Abstract: The particle detection circuit comprises a plurality of basic circuits. Each basic circuit comprises a particle detector element connected to an associated counter and a summing circuit having a first input connected to the output of the counter. Basic circuits, each forming a subpixel, are grouped together by series connection of their summing circuits to form a pixel. The output of the pixel, formed by the output of the summing circuit of a last basic circuit of the pixel, supplies counting signals representative of the number of particles detected by the set of basic circuits of the pixel. Disabling certain basic circuits of the pixel, by selective zero resetting of the first input of their summing circuit, can enable only the particles detected by certain zones of the pixel to be counted.

Abstract: A device for measuring exposure to radiations including at least a component for detecting photons including at least a component for detecting photons or particles associated with at least one circuit for acquiring and counting detection events. The response curve of the number of counted events versus the number of photons or particles sensed by each detection component is a monotonous increasing curve.

Abstract: The particle detection circuit comprises a plurality of basic circuits. Each basic circuit comprises a particle detector element connected to an associated counter and a summing circuit having a first input connected to the output of the counter. Basic circuits, each forming a subpixel, are grouped together by series connection of their summing circuits to form a pixel. The output of the pixel, formed by the output of the summing circuit of a last basic circuit of the pixel, supplies counting signals representative of the number of particles detected by the set of basic circuits of the pixel. Disabling certain basic circuits of the pixel, by selective zero resetting of the first input of their summing circuit, can enable only the particles detected by certain zones of the pixel to be counted.

Abstract: A device for measuring exposure to radiations including at least a component for detecting photons including at least a component for detecting photons or particles associated with at least one circuit for acquiring and counting detection events. The response curve of the number of counted events versus the number of photons or particles sensed by each detection component is a monotonous increasing curve.

Abstract: An image sensor with matrix readout includes a matrix of elementary photodetectors (P) connected through at least a bus (Bpel) to a remote integrator (I) which converts the signal of each elementary photodetector into a voltage. Provided between the end of the bus and the input of the integrator is an impedance matching device (D) with low output capacitance, delivering at its output, during the time for converting photodetector signal, a variation of charge which corresponds to an affine function of the charge present at the input of said matching device, wherein this charge variation is determined by: ? t = 0 t = Tconv ? Iinj ? ( t ) · ? t = ? t = 0 t = Tconv ? I ? ? int ? ( t ) · ? t where Iinj is the instantaneous current of the bus, injected at the input of the impedance matching device, Iint is the instantaneous current at the input of the integrator and Tconv is the conversion time.

Abstract: Methods and apparatus for focusing proton and ion beams within the profile of the beam envelope of an ultra-low emittance, charge neutralized emission to create a pattern without focusing the entire beam envelope or rastering. In one implementation, a method for use with laser accelerated ion beams comprises the steps: irradiating a surface of a target with pulsed laser irradiation to produce an electron plasma emission on a non-irradiated surface of the target, the electron plasma emission producing an ion beam emission on the non-irradiated surface, the ion beam emission having a beam envelope; and focusing ions of the ion beam emission into a plurality of component beams within the beam envelope as a result of the shape of the non-irradiated surface of the target.

Abstract: Methods and apparatus for focusing proton and ion beams within the profile of the beam envelope of an ultra-low emittance, charge neutralized emission to create a pattern without focusing the entire beam envelope or rastering. In one implementation, a method for use with laser accelerated ion beams comprises the steps: irradiating a surface of a target with pulsed laser irradiation to produce an electron plasma emission on a non-irradiated surface of the target, the electron plasma emission producing an ion beam emission on the non-irradiated surface, the ion beam emission having a beam envelope; and focusing ions of the ion beam emission into a plurality of component beams within the beam envelope as a result of the shape of the non-irradiated surface of the target.

Abstract: The invention concerns a charges circuit reader containing charges storage material (Tc), charges addressing (Ta) and charges/voltage conversion material (Aj) including a conversion capacity, addressing material enabling control of the supply, in the conversion material, of stored charges in the storage material. The circuit includes calibration material (Tccal, Tacal, Il, Ccal) to deliver representative information (Vs) of the charges stored in the stored material and material (K, I2) to select the conversion capacity from the said information.

Abstract: The invention relates to an image sensor with matrix readout including a matrix of elementary photodetectors (P) connected through at least a bus (Bpel) to a remote integrator (I) which converts the signal of each elementary photodetector into a voltage, characterized in that it includes, between the end of the bus and the input of the integrator, an impedance matching device (D) with low output capacitance, delivering at its output, during the time for converting a photodetector signal, a variation of charge which corresponds to an affine function of the charge present at the input of said matching device, wherein this charge variation is determined by: 1 ∫ t = 0 t = Tconv ⁢ Iinj ⁢ ( t ) · ⅆ t = ∫ t = 0 t = Tconv ⁢ I ⁢   ⁢ int ⁢ ( t ) · ⅆ t

Abstract: A device and a method of digitalisation for at least one photosensitive detector (DET(i,j)), which supplies a current, the intensity of which varies in relation to the incident flux, and a method for reading a matrix of photonic detectors. The device includes an assembly of elementary points (PEL(i,j)) which enables the signals supplied by each detector to be read. The quantity processed is the charge, each elementary point carrying out a preintegration of the current supplied by a corresponding detector and at least one information processing chain, including a regeneration device which carries out a reading of the resultant charge quantity in the form of a current pulse so as to package the signals supplied by the detectors; the signals coming from the processing chain(s) being multiplexed to at least one digital output.