Abstract: A package on package (PoP) apparatus includes a shared ZQ calibration path and a shared ZQ calibration resistor for calibrating multiple channels of DRAM on a memory package of the PoP apparatus. Arbitration circuitry on a processor package of the PoP apparatus is coupled to separate memory controllers for the multiple memory channels. The arbitration circuitry is configured to indicate availability of the shared ZQ calibration resistor. The memory controllers are configured to communicate with the arbitration circuitry before performing a ZQ calibration and to delay the ZQ calibration when the arbitration circuitry indicates the ZQ calibration resistor is busy.

Abstract: A package on package (PoP) apparatus includes a shared ZQ calibration path and a shared ZQ calibration resistor for calibrating multiple channels of DRAM on a memory package of the PoP apparatus. Arbitration circuitry on a processor package of the PoP apparatus is coupled to separate memory controllers for the multiple memory channels. The arbitration circuitry is configured to indicate availability of the shared ZQ calibration resistor. The memory controllers are configured to communicate with the arbitration circuitry before performing a ZQ calibration and to delay the ZQ calibration when the arbitration circuitry indicates the ZQ calibration resistor is busy.

Abstract: Multiple memory devices within a rank may be accessed individually by assigning respective device identifiers to memory devices within a rank and/or including an indicator on respective portions of a data path that are coupled to different devices within a rank. A device identifier assignment command is implemented during memory system initialization to assign the device identifiers. Device identifiers are sent to corresponding memory devices in the rank via the data path when the device identifier assignment command is asserted. Device identifier fields are added to certain commands in a command path protocol. Individual memory devices within a rank are addressable by including their respective device identifier in the device identifier field of a memory command on the command path. Individual memory devices within a rank may also be accessed by configuring the devices to execute commands only when an indicator is received on their respective portion of the data path.