Abstract: A line protector circuit comprises an external side switch circuit coupled to an external circuit node of the line protector circuit, an internal side switch circuit coupled in series to the external side switch circuit and an internal circuit node of the line protector circuit, a high supply circuit node and a low supply circuit node, and switch control circuitry configured to deactivate the internal side switch circuit and divert a bias current from the external side switch to the low supply circuit node when the external voltage exceeds a high supply voltage of the high supply circuit node.

Abstract: A line protector circuit comprises an external side switch circuit coupled to an external circuit node of the line protector circuit, an internal side switch circuit coupled in series to the external side switch circuit and an internal circuit node of the line protector circuit, a high supply circuit node and a low supply circuit node, and switch control circuitry configured to deactivate the internal side switch circuit and divert a bias current from the external side switch to the low supply circuit node when the external voltage exceeds a high supply voltage of the high supply circuit node.

Abstract: Systems for monitoring or control can include reconfigurable input and output channels. Such reconfigurable channels can include as few as a single terminal and a ground pin, or such channels can include three or four terminal configuration such as for use in four-terminal resistance measurements. Channel reconfiguration can be accomplished such as using software-enabled or firmware-enabled control of channel hardware. Such channel hardware can include analog-to-digital and digital-to-analog conversion capability, including use of a digital-to-analog converter to provide field power or biasing. In an example, compensation can be provided to suppress a leakage current from flowing through a digital output to a load connected to the reconfigurable channel terminal, particularly when the digital output is disabled.

Abstract: Systems for monitoring or control can include reconfigurable input and output channels. Such reconfigurable channels can include as few as a single terminal and a ground pin, or such channels can include three or four terminal configuration such as for use in four-terminal resistance measurements. Channel reconfiguration can be accomplished such as using software-enabled or firmware-enabled control of channel hardware. Such channel hardware can include analog-to-digital and digital-to-analog conversion capability, including use of a digital-to-analog converter to provide field power or biasing. In an example, compensation can be provided to suppress a leakage current from flowing through a digital output to a load connected to the reconfigurable channel terminal, particularly when the digital output is disabled.

Abstract: Techniques for mixing, or modulating, a high-frequency, digital communication signal with a low-frequency, analog current loop signal are provided. In certain examples, the techniques allow mixing the signals in a non-AC coupled manner. In certain examples, such mixing techniques can allow for simplified connections between a modem chip and an analog current loop interface chip of an analog I/O module.

Abstract: A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N?1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2? radians or a multiple thereof, where N is greater than 1.

Abstract: Systems for monitoring or control can include reconfigurable input and output channels. Such reconfigurable channels can include as few as a single terminal and a ground pin, or such channels can include three or four terminal configuration such as for use in four-terminal resistance measurements. Channel reconfiguration can be accomplished such as using software-enabled or firmware-enabled control of channel hardware. Such channel hardware can include analog-to-digital and digital-to-analog conversion capability, including use of a digital-to-analog converter to provide field power or biasing. In an example, the interface circuit can provide a selectable impedance.

Abstract: Systems for monitoring or control can include reconfigurable input and output channels. Such reconfigurable channels can include as few as a single terminal and a ground pin, or such channels can include three or four terminal configuration such as for use in four-terminal resistance measurements. Channel reconfiguration can be accomplished such as using software-enabled or firmware-enabled control of channel hardware. Such channel hardware can include analog-to-digital and digital-to-analog conversion capability, including use of a digital-to-analog converter to provide field power or biasing. In an example, the interface circuit can provide a selectable impedance.

Abstract: A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N?1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2? radians or a multiple thereof, where N is greater than 1.

Abstract: In a system for stabilizing a wall, especially a masonry wall (10), movement away from the wall of a rigid member (30) is prevented by a thrust rod (70) that is anchored to joists associated with the wall. The thrust rod acts on an unsecured upper end (32) of the rigid member and is adjustably received in a thrust bracket (60) affixed directly or indirectly to the joists. A warning collar (80) placed on the upper end is retained in place by the thrust rod, which normally bears against the upper end through an aperture in the warning collar. If the upper end retreats away from the thrust rod towards the wall by more than a predetermined distance, the warning collar slides down the rigid member, triggering a signal means (90).

Abstract: In a system for stabilizing a wall, especially a masonry wall (10), movement away from the wall of a rigid member (30) is prevented by a thrust rod (70) that is anchored to joists associated with the wall. The thrust rod acts on an unsecured upper end (32) of the rigid member and is adjustably received in a thrust bracket (60) affixed directly or indirectly to the joists. A warning collar (80) placed on the upper end is retained in place by the thrust rod, which normally bears against the upper end through an aperture in the warning collar. If the upper end retreats away from the thrust rod towards the wall by more than a predetermined distance, the warning collar slides down the rigid member, triggering a signal means (90).

Abstract: A DAC architecture is described. The architecture is specifically adapted to provided an analog voltage output based on a digital input word. The architecture includes a resistor ladder configuration sub-divisible into a first component, adapted to convert a lower part of the input word, and a second component adapted to convert an upper part of the input word. The DAC is calibrated such that the first component can be used to tune the output of the second component on selection of specific segment from the second component.

Abstract: A circuit (1) comprising eight DACs (2a to 2h), the analog outputs of which are applied to the non-inverting inputs (6) of corresponding op-amps (7a to 7h) for gaining up the analog output voltage from the corresponding DAC (2). The op-amps (7) are identical, and are configured in a non-inverting mode with a closed loop gain of two provided by first and second resistors (R1) and (R2). Primary outputs (8) of the op-amps (7) are coupled to output pins (9a to 9h) of the circuit (1). The second resistors (R2) couple primary inverting inputs (12) of the op-amps (7) to a common lo voltage reference rail (14), which is coupled to a true ground reference pin (15) through a coupling wire (16)which exhibit a combined inherent resistance (Rp). The voltage reference on the common voltage reference rail (14) varies with time as the output signals of the pa-amps (7) vary, and would thus result in cross-talk between the DACs (2a to 2h).