Abstract: In a method of forming a matrix addressable display comprising a group of switchable cells, such as liquid crystal cells, having electrodes on each of two parallel plates and thin-film drive transistors disposed on one of the plates, gate resistors are provided by elongate doped polysilicon regions connecting the gate electrodes to address lines. The gate resistors prevent short-circuiting of the address lines in the event of a gate short-circuit occurring in any of the transistors.

Abstract: In a method of driving liquid crystal cells in an active matrix addressed display of the resistively-coupled transistor type whereby interlacing of alternate rows of pixels is achieved, rows N-1, N+1, N+3, - - - of the cells are addressed in sequence in a first field period by applying transistor turn-on pulses to the associated row address lines while reference signals are applied to the row address lines associated with rows, N, N+2, N+4, - - - in sequence, the turn-on pulse for the row N-1 and the reference signal for the row N being coincident. During a second field period of the transistor turn-on pulses are applied to the address lines for rows N, N+2, N+4, - - - while reference signals are applied to the address lines for rows N-1, N+3, N+5, - - - the turn-on pulse for the row N and the reference signal for the row N+1 being coincident. The reference signal may be of two different magnitudes which alternate at the line rate or at the frame rate of a television video signal.