Abstract: In an electronic device having a compact form factor, such as a head mounted display device, flexible printed circuits may be utilized to provide interconnects between EMI-generating peripheral components and other components in the device such as those populated on main circuit boards. Coverlays utilized to protect circuit traces and ground planes in the flexible printed circuits are configured with openings that can expose ground planes at various locations throughout the electronic device. Electrical pathways are formed by conductive foam, conductive adhesives, and/or other conductive materials between the exposed ground planes and a device ground to establish multiple ground loops throughout the device that shunt EMI energy that is generated by electronic components and circuits during device operation. The coverlay openings can be positioned on the flexible printed circuits so that the lengths of the ground loops are minimized to enhance overall EMI emission management performance.

Abstract: In an electronic device that employs high-speed differential signaling on one or more pairs of conductors in a flexible printed circuit, RF chokes are placed in the differential signal path and mounted directly on the flexible printed circuit which is used to interconnect a peripheral device, such as an image sensor, through a connector to another device component such as a main printed circuit board. The RF chokes are configured to suppress common-mode noise propagating in the differential pairs of conductors. In one illustrative embodiment, the RF chokes are located on the flexible printed circuit adjacent to the peripheral device to suppress common-mode noise near its source. In another illustrative embodiment, the RF chokes are mounted adjacent to the connector to suppress the common-mode noise before it has an opportunity to escape the flexible printed circuit at the major discontinuity presented by the connector.

Abstract: A capacitor structure may be incorporated into an interposer or substrate associated with an IC chip to stabilize the input/output signals, such as power and ground, between the IC chip and a printed circuit board. In accordance with one embodiment, the capacitor structure may include a plurality of individual capacitors connected together to form a monolithic capacitor blade having a length, width, and height, wherein each of the length and height of the blade spans multiple of the individual capacitors. The blade includes multiple electrical conductive paths extending the height of the capacitor blade. According to another embodiment, the capacitor structure includes multiple interleaved power and ground layers separated by insulating layers. The power layers connect to power leads and the ground layers connect to ground leads.

Abstract: A capacitor structure may be incorporated into an interposer or substrate associated with an IC chip to stabilize the input/output signals, such as power and ground, between the IC chip and a printed circuit board. In accordance with one embodiment, the capacitor structure may include a plurality of individual capacitors connected together to form a monolithic capacitor blade having a length, width, and height, wherein each of the length and height of the blade spans multiple of the individual capacitors. The blade includes multiple electrical conductive paths extending the height of the capacitor blade. According to another embodiment, the capacitor structure includes multiple interleaved power and ground layers separated by insulating layers. The power layers connect to power leads and the ground layers connect to ground leads.

Abstract: A capacitor structure may be incorporated into an interposer or substrate associated with an IC chip to stabilize the input/output signals, such as power and ground, between the IC chip and a printed circuit board. In accordance with one embodiment, the capacitor structure may include a plurality of individual capacitors connected together to form a monolithic capacitor blade having a length, width, and height, wherein each of the length and height of the blade spans multiple of the individual capacitors. The blade includes multiple electrical conductive paths extending the height of the capacitor blade. According to another embodiment, the capacitor structure includes multiple interleaved power and ground layers separated by insulating layers. The power layers connect to power leads and the ground layers connect to ground leads.