Abstract: A circuit includes a first operational amplifier having an inverting input and a non-inverting input, and a negative resistance circuit connected to the inverting input of the operational amplifier. The negative resistance circuit includes a second operational amplifier, a current source controlled by the second operational amplifier, and a cross-coupled transistor circuit having at least one transistor biased by a current produced by the current source.

Abstract: Described herein are DACs with low distortion for high dynamic range (HDR), extremely high dynamic range (EHDR), and other suitable applications. Some embodiments relate to a device including a DAC configured for coupling to an amplifier via a force path and a sense path. For example, the DAC may provide output current to the amplifier via the force path, and the DAC may sense the input voltage of the amplifier via the sense path. Accordingly, distortion such as harmonic distortion and/or gain offset from parasitic impedances in the force and/or sense paths may be reduced or eliminated. Some embodiments relate to a DAC including a voltage reference generator configured to compensate for variations in impedances of the DAC, such as due to semiconductor process variation. Accordingly, distortion in the DAC output due to variations in the DAC impedances may be reduced or eliminated.

Abstract: A circuit includes a first operational amplifier having an inverting input and a non-inverting input, and a negative resistance circuit connected to the inverting input of the operational amplifier. The negative resistance circuit includes a second operational amplifier, a current source controlled by the second operational amplifier, and a cross-coupled transistor circuit having at least one transistor biased by a current produced by the current source.

Abstract: Described herein are DACs with low distortion for high dynamic range (HDR), extremely high dynamic range (EHDR), and other suitable applications. Some embodiments relate to a device including a DAC configured for coupling to an amplifier via a force path and a sense path. For example, the DAC may provide output current to the amplifier via the force path, and the DAC may sense the input voltage of the amplifier via the sense path. Accordingly, distortion such as harmonic distortion and/or gain offset from parasitic impedances in the force and/or sense paths may be reduced or eliminated. Some embodiments relate to a DAC including a voltage reference generator configured to compensate for variations in impedances of the DAC, such as due to semiconductor process variation. Accordingly, distortion in the DAC output due to variations in the DAC impedances may be reduced or eliminated.

Abstract: The invention provides an anti-aliasing filter (AAF) for discretization at a sampling period. The AAF may include an operational amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal, a second capacitor, and a first switch coupled between the first capacitor and the second capacitor. During a first phase, the first switch may conduct the second capacitor to the first capacitor. During a second phase, the first switch may stop conducting the second capacitor to the first capacitor. The first phase may last for one said sampling period.

Abstract: The invention provides an anti-aliasing filter (AAF) for discretization at a sampling period. The AAF may include an operational amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal, a second capacitor, and a first switch coupled between the first capacitor and the second capacitor. During a first phase, the first switch may conduct the second capacitor to the first capacitor. During a second phase, the first switch may stop conducting the second capacitor to the first capacitor. The first phase may last for one said sampling period.

Abstract: Various technologies and techniques are disclosed for providing pluggable model elements. A modeling application is provided that is operable to allow custom model elements to be loaded. Custom behavior can be associated with the custom model element types in a modular fashion that allows custom behaviors to be plugged in. The modeling application interacts with an artifact mapper to automatically synchronize a particular model in the modeling application with an underlying one or more artifacts represented by the particular model. Events are intercepted between model elements and underlying artifacts that the model elements represent. As events are intercepted, one or more appropriate provider plug-ins are called to perform one or more associated actions. A user who toggles between a modeling application and an artifact source application is provided with a seamless viewing experience because the model elements and underlying artifacts are kept up to date with each other.

Abstract: Various technologies and techniques are disclosed for providing pluggable model elements. A modeling application is provided that is operable to allow custom model elements to be loaded. Custom behavior can be associated with the custom model element types in a modular fashion that allows custom behaviors to be plugged in. The modeling application interacts with an artifact mapper to automatically synchronize a particular model in the modeling application with an underlying one or more artifacts represented by the particular model. Events are intercepted between model elements and underlying artifacts that the model elements represent. As events are intercepted, one or more appropriate provider plug-ins are called to perform one or more associated actions. A user who toggles between a modeling application and an artifact source application is provided with a seamless viewing experience because the model elements and underlying artifacts are kept up to date with each other.

Abstract: An enclosure for electronic and/or electrical components is disclosed, including a housing having a rear wall and longitudinally extending side walls. A longitudinally extending track is provided which includes a base leg and a pair of branch legs extending laterally therefrom. Each of the laterally extending legs is spaced apart by a gap from at least one side wall of the housing. A mounting bracket is slidable to and fro along the track, the bracket including at least one leg in sliding contact with a bearing region of the track and at least one opening for receipt therein of a fastener. The opening is positioned to direct the fastener inserted therein into engagement with a fastener engaging region of the track, whereby the at least one leg of the bracket bears against the bearing region of the track to prevent movement of the bracket relative to the track.