Patents by Inventor Patrick Cooney

Patrick Cooney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11228283
    Abstract: A circuit includes a first operational amplifier having an inverting input and a non-inverting input, and a negative resistance circuit connected to the inverting input of the operational amplifier. The negative resistance circuit includes a second operational amplifier, a current source controlled by the second operational amplifier, and a cross-coupled transistor circuit having at least one transistor biased by a current produced by the current source.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: January 18, 2022
    Assignee: MEDIATEK Singapore Pte. Ltd.
    Inventors: Taehoon Jeong, Patrick Cooney
  • Publication number: 20210396763
    Abstract: A method for testing for the presence and quantification of A1-type beta-casein variants or A2-type beta-caseins, in milk and milk derived dairy products, using chymotrypsin digestion followed by LC-MS analysis to determining the concentrations of beta-casein digestion peptides and using the concentrations to calculate the amounts of A1-type beta-casein variants or A2-type beta-casein variants present.
    Type: Application
    Filed: October 29, 2019
    Publication date: December 23, 2021
    Inventors: Terence Patrick Cooney, Jacob Evan Jaine
  • Patent number: 10855299
    Abstract: Described herein are DACs with low distortion for high dynamic range (HDR), extremely high dynamic range (EHDR), and other suitable applications. Some embodiments relate to a device including a DAC configured for coupling to an amplifier via a force path and a sense path. For example, the DAC may provide output current to the amplifier via the force path, and the DAC may sense the input voltage of the amplifier via the sense path. Accordingly, distortion such as harmonic distortion and/or gain offset from parasitic impedances in the force and/or sense paths may be reduced or eliminated. Some embodiments relate to a DAC including a voltage reference generator configured to compensate for variations in impedances of the DAC, such as due to semiconductor process variation. Accordingly, distortion in the DAC output due to variations in the DAC impedances may be reduced or eliminated.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: December 1, 2020
    Assignee: MEDIATEK Singapore Pte. Ltd.
    Inventors: Ayman Shabra, Michael A Ashburn, Jr., Patrick Cooney, Adalberto Cantoni, Joshua M. Bamford
  • Publication number: 20200321919
    Abstract: A circuit includes a first operational amplifier having an inverting input and a non-inverting input, and a negative resistance circuit connected to the inverting input of the operational amplifier. The negative resistance circuit includes a second operational amplifier, a current source controlled by the second operational amplifier, and a cross-coupled transistor circuit having at least one transistor biased by a current produced by the current source.
    Type: Application
    Filed: April 6, 2020
    Publication date: October 8, 2020
    Applicant: MEDIATEK Singapore Pte. Ltd.
    Inventors: Taehoon Jeong, Patrick Cooney
  • Publication number: 20200112317
    Abstract: Described herein are DACs with low distortion for high dynamic range (HDR), extremely high dynamic range (EHDR), and other suitable applications. Some embodiments relate to a device including a DAC configured for coupling to an amplifier via a force path and a sense path. For example, the DAC may provide output current to the amplifier via the force path, and the DAC may sense the input voltage of the amplifier via the sense path. Accordingly, distortion such as harmonic distortion and/or gain offset from parasitic impedances in the force and/or sense paths may be reduced or eliminated. Some embodiments relate to a DAC including a voltage reference generator configured to compensate for variations in impedances of the DAC, such as due to semiconductor process variation. Accordingly, distortion in the DAC output due to variations in the DAC impedances may be reduced or eliminated.
    Type: Application
    Filed: August 29, 2019
    Publication date: April 9, 2020
    Applicant: MEDIATEK Singapore Pte. Ltd.
    Inventors: Ayman Shabra, Michael A. Ashburn, JR., Patrick Cooney, Adalberto Cantoni, Joshua M. Bamford
  • Patent number: 10483947
    Abstract: The invention provides an anti-aliasing filter (AAF) for discretization at a sampling period. The AAF may include an operational amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal, a second capacitor, and a first switch coupled between the first capacitor and the second capacitor. During a first phase, the first switch may conduct the second capacitor to the first capacitor. During a second phase, the first switch may stop conducting the second capacitor to the first capacitor. The first phase may last for one said sampling period.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: November 19, 2019
    Assignee: MEDIATEK INC.
    Inventors: Tien-Yu Lo, Chan-Hsiang Weng, Patrick Cooney, Tsung-Kai Kao, Stacy Ho
  • Publication number: 20190288672
    Abstract: The invention provides an anti-aliasing filter (AAF) for discretization at a sampling period. The AAF may include an operational amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal, a second capacitor, and a first switch coupled between the first capacitor and the second capacitor. During a first phase, the first switch may conduct the second capacitor to the first capacitor. During a second phase, the first switch may stop conducting the second capacitor to the first capacitor. The first phase may last for one said sampling period.
    Type: Application
    Filed: October 11, 2018
    Publication date: September 19, 2019
    Inventors: Tien-Yu LO, Chan-Hsiang WENG, Patrick Cooney, Tsung-Kai KAO, Stacy HO
  • Patent number: 8176465
    Abstract: Various technologies and techniques are disclosed for providing pluggable model elements. A modeling application is provided that is operable to allow custom model elements to be loaded. Custom behavior can be associated with the custom model element types in a modular fashion that allows custom behaviors to be plugged in. The modeling application interacts with an artifact mapper to automatically synchronize a particular model in the modeling application with an underlying one or more artifacts represented by the particular model. Events are intercepted between model elements and underlying artifacts that the model elements represent. As events are intercepted, one or more appropriate provider plug-ins are called to perform one or more associated actions. A user who toggles between a modeling application and an artifact source application is provided with a seamless viewing experience because the model elements and underlying artifacts are kept up to date with each other.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: May 8, 2012
    Assignee: Microsoft Corporation
    Inventors: Suhail Dutta, Bill Gibson, Patrick Cooney
  • Publication number: 20110085879
    Abstract: A bin, including a receptacle movable between a first condition of use for loading and a second condition of use in which it can be engaged for emptying; and attachment means including first and second elongate sleeves for engagement by respective forks of a front lift truck, wherein in the second condition of use the receptacle is arranged in a manner whereby forks of a front lift truck can engage respective sleeves of the attachment means so that the bin can be lifted and emptied by the truck.
    Type: Application
    Filed: October 4, 2010
    Publication date: April 14, 2011
    Applicant: TRAILER TRASH PTY LTD
    Inventors: Thomas Alexander Garfield Jamieson, Dale Patrick Cooney
  • Publication number: 20080209390
    Abstract: Various technologies and techniques are disclosed for providing pluggable model elements. A modeling application is provided that is operable to allow custom model elements to be loaded. Custom behavior can be associated with the custom model element types in a modular fashion that allows custom behaviors to be plugged in. The modeling application interacts with an artifact mapper to automatically synchronize a particular model in the modeling application with an underlying one or more artifacts represented by the particular model. Events are intercepted between model elements and underlying artifacts that the model elements represent. As events are intercepted, one or more appropriate provider plug-ins are called to perform one or more associated actions. A user who toggles between a modeling application and an artifact source application is provided with a seamless viewing experience because the model elements and underlying artifacts are kept up to date with each other.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 28, 2008
    Applicant: Microsoft Corporation
    Inventors: Suhail Dutta, Bill Gibson, Patrick Cooney
  • Patent number: 7067003
    Abstract: A cementitious mixture for concrete including an admixture including dunder having a solids content in a range of from 5% to substantially 100% by weight, the dunder being added to the cement in a range of from 0.1% to 5% by weight of cement in a concentration which results in the initial setting time being less than thirty-six hours.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: June 27, 2006
    Assignee: Olmway Pty Ltd
    Inventor: David Patrick Cooney
  • Patent number: 6604798
    Abstract: An enclosure for electronic and/or electrical components is disclosed, including a housing having a rear wall and longitudinally extending side walls. A longitudinally extending track is provided which includes a base leg and a pair of branch legs extending laterally therefrom. Each of the laterally extending legs is spaced apart by a gap from at least one side wall of the housing. A mounting bracket is slidable to and fro along the track, the bracket including at least one leg in sliding contact with a bearing region of the track and at least one opening for receipt therein of a fastener. The opening is positioned to direct the fastener inserted therein into engagement with a fastener engaging region of the track, whereby the at least one leg of the bracket bears against the bearing region of the track to prevent movement of the bracket relative to the track.
    Type: Grant
    Filed: August 10, 2000
    Date of Patent: August 12, 2003
    Assignee: Integra Enclosures
    Inventor: Patrick Cooney