Abstract: A host computer, coupled to a peripheral device by its system bus, identifies an available input/output address and designates that input/output address as being assigned to that peripheral device. After identification of the available input/output address, the host computer transmits a logic trigger signal in the form of a sequence of write commands that write the assigned input/output address, as well as other configuration parameters, to an infrequently used input/output address. In response to the logic trigger, the peripheral reads and stores the assigned input/output address and other configuration parameters from the host computer's data bus, The configuration parameters and the assigned input/output address are then written to an EEPROM for non-volatile storage. After this configuration is established, the peripheral device automatically retrieves the stores configuration parameters and assigned input/output address from the EEPROM every time the host computer is turned on or is otherwise reset.