Abstract: Data is communicated. In accordance with one or more example embodiments, a communications circuit communicates a digital data signal using a carrier signal having a frequency that is different than the frequency of the data signal. The communications circuit includes first and second sets of capacitors, a first circuit and a second circuit. The first circuit generates mixed data signals respectively mixed with the carrier signal and an inverse of the carrier signal, generates mixed inverted data signals respectively mixed with the carrier signal and an inverse of the carrier signal, provides the mixed data signals to the first set of capacitors, and provides the mixed inverted data signals to the second set of capacitors. The second circuit recovers the data signal from the mixed signals.

Abstract: Data is communicated. In accordance with one or more example embodiments, a communications circuit communicates a digital data signal using a carrier signal having a frequency that is different than the frequency of the data signal. The communications circuit includes first and second sets of capacitors, a first circuit and a second circuit. The first circuit generates mixed data signals respectively mixed with the carrier signal and an inverse of the carrier signal, generates mixed inverted data signals respectively mixed with the carrier signal and an inverse of the carrier signal, provides the mixed data signals to the first set of capacitors, and provides the mixed inverted data signals to the second set of capacitors. The second circuit recovers the data signal from the mixed signals.

Abstract: The invention refers to a power converter and to a method for power conversion. The power converter includes a primary winding adapted to receive a primary alternating voltage. The converter further includes a first secondary circuit magnetically coupled to the primary winding, the first secondary circuit generating a first secondary output signal, the power converter further includes a second secondary circuit magnetically coupled to the primary winding. The power converter includes a post regulator adapted to be coupled to the second secondary circuit, the post regulator having a switch which is opened at every zero-crossing of the first output signal.

Abstract: A voltage converter comprises an inductive circuit (L) for storing energy during an inductive magnetizing mode and transferring energy during an inductive demagnetizing mode. In addition the voltage converter comprises at least two non-inverting branches (12, 13, 14) for providing at least two non-inverted output voltages (Va, Vb, Vc) and an inverting branch (15) for providing an inverted output voltage. The inverting (15) and non-inverting (12, 13, 14) branches being parallely coupled to an output (10) of the inductive circuit (L). The inductive circuit being arranged to transfer energy to the inverting branch (15) and to one of the at least two non-inverting branches (12, 13, 14). Through this, the inverted voltage (Vinv) and the corresponding non-inverted output voltage (Va, Vb, Vc) of the one of the at least two non-inverting branches (12, 13, 14) are having an opposite polarity and a substantially equal magnitude.

Abstract: A charge pump (1) for generating a first output voltage (Vo1) between a first output terminal (E) and a reference terminal (D), and a second output voltage (Vo2) between a second output terminal (F) and the reference terminal (D). The charge pump (1) further comprises a first input terminal (C) for inputting a DC voltage (V), a first storage capacitor (Cr1) coupled between the first output terminal (E) and the reference terminal (D) and a second storage capacitor (Cr2) coupled between the second output terminal (F) and the reference terminal (D). The charge pump (1) further comprises a first terminal (A) and a second terminal (B) for coupling a pump capacitor (Cp) to a first triplet of switches (S1, S2, S5) and to a second triplet of switches (S3, S4, S6). The first triplet of switches (S1, S2, S5) selectively couples the first terminal (A) to either the first input terminal (C) or to the reference terminal (D) or to the second output terminal (F).