Patents by Inventor Patrick F. Johnson

Patrick F. Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for selectable hardware accelerators
    Patent number: 8754893
    Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: June 17, 2014
    Assignee: Intel Corporation
    Inventors: Louis A. Lippincott, Patrick F. Johnson
  • APPARATUS AND METHOD FOR SELECTABLE HARDWARE ACCELERATORS
    Publication number: 20120032964
    Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.
    Type: Application
    Filed: October 19, 2011
    Publication date: February 9, 2012
    Inventors: Louis A. Lippincott, Patrick F. Johnson
  • Apparatus and method for selectable hardware accelerators in a data driven architecture
    Patent number: 8063907
    Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: November 22, 2011
    Assignee: Intel Corporation
    Inventors: Louis A. Lippincott, Patrick F. Johnson
  • Apparatus and method for selectable hardware accelerators in a data driven architecture
    Patent number: 7714870
    Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: May 11, 2010
    Assignee: Intel Corporation
    Inventors: Louis A. Lippincott, Patrick F. Johnson
  • APPARATUS AND METHOD FOR SELECTABLE HARDWARE ACCELERATORS IN A DATA DRIVEN ARCHITECTURE
    Publication number: 20090309884
    Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.
    Type: Application
    Filed: August 26, 2009
    Publication date: December 17, 2009
    Applicant: INTEL CORPORATION
    Inventors: Louis A. Lippincott, Patrick F. Johnson
  • Apparatus and method for selectable hardware accelerators in a data driven architecture
    Publication number: 20040257370
    Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.
    Type: Application
    Filed: June 23, 2003
    Publication date: December 23, 2004
    Inventors: Louis A. Lippincott, Patrick F. Johnson