Patents by Inventor Patrick Guyard

Patrick Guyard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for demodulating a RF signal
    Patent number: 12647140
    Abstract: The present disclosure relates to a method for demodulating a RF signal comprising the steps of: detecting if an analog to digital converter (ADC) of a Near Zero Intermediate Frequency (NZIF) receiver is in a clipping state; and if yes: determining and storing a first value (RSSI1) representative of the energy of a received signal demodulated by the Near Zero Intermediate Frequency (NZIF) receiver using a first intermediate frequency (IF1); determining and storing a second value (RSSI2) representative of the energy of the received signal demodulated by the Near Zero Intermediate Frequency (NZIF) receiver using a second intermediate frequency (IF2) corresponding to the opposite value of the first intermediate frequency (IF1), selecting the intermediate frequency corresponding to the lowest value of said first and second values.
    Type: Grant
    Filed: December 21, 2023
    Date of Patent: June 2, 2026
    Assignee: STMICROELECTRONICS (GRAND OUEST) SAS
    Inventors: Francois Sittler, Patrick Guyard
  • METHOD FOR DEMODULATING A RF SIGNAL
    Publication number: 20240214010
    Abstract: The present disclosure relates to a method for demodulating a RF signal comprising the steps of: detecting if an analog to digital converter (ADC) of a Near Zero Intermediate Frequency (NZIF) receiver is in a clipping state; and if yes: determining and storing a first value (RSSI1) representative of the energy of a received signal demodulated by the Near Zero Intermediate Frequency (NZIF) receiver using a first intermediate frequency (IF1); determining and storing a second value (RSSI2) representative of the energy of the received signal demodulated by the Near Zero Intermediate Frequency (NZIF) receiver using a second intermediate frequency (IF2) corresponding to the opposite value of the first intermediate frequency (IF1), selecting the intermediate frequency corresponding to the lowest value of said first and second values.
    Type: Application
    Filed: December 21, 2023
    Publication date: June 27, 2024
    Inventors: Francois Sittler, Patrick Guyard
  • Generation of a low jitter clock signal
    Patent number: 8085080
    Abstract: Systems and methods for generation of a low jitter clock signal for wireless circuits are disclosed. In an implementation, the system includes a wireless circuit powered by a first power supply and a low jitter clock (LJC) generator powered by a second power supply. The LJC generator provides at least one clock signal to the wireless circuit. The system further includes an LJC driver circuit including a clock buffer powered by the first power supply and a receive buffer powered by the second power supply.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: December 27, 2011
    Assignees: ST-Ericsson SA, ST-Ericsson India Pvt. Ltd.
    Inventors: Srinath Sridharan, Ramkishore Ganti, Patrick Guyard
  • GENERATION OF A LOW JITTER CLOCK SIGNAL
    Publication number: 20100219871
    Abstract: Systems and methods for generation of a low jitter clock signal for wireless circuits are disclosed. In an implementation, the system includes a wireless circuit powered by a first power supply and a low jitter clock (LJC) generator powered by a second power supply. The LJC generator provides at least one clock signal to the wireless circuit. The system further includes an LJC driver circuit including a clock buffer powered by the first power supply and a receive buffer powered by the second power supply.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 2, 2010
    Applicants: ST-Ericsson India Pvt Ltd., ST-Ericsson SA
    Inventors: Srinath Sridharan, Ramkishore Ganti, Patrick Guyard