Patents by Inventor Patrick HANEKAMP

Patrick HANEKAMP has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12543509
    Abstract: A layered structure includes a silicon-based substrate comprising a substrate surface; a titanium-copper seed layer arranged on the substrate surface, wherein the titanium-copper seed layer comprises a titanium layer and a copper layer, wherein the titanium layer is arranged on the substrate surface such that covalent bonds are formed between the titanium layer and silicon of the silicon-based substrate, and wherein the copper layer is arranged directly on the titanium layer, such that the titanium layer is arranged between the substrate surface and the copper layer; and a nickel-iron plating layer arranged directly on the copper layer of the titanium-copper seed layer such that the titanium-copper seed layer is arranged between the silicon-based substrate and the nickel-iron plating layer.
    Type: Grant
    Filed: August 11, 2023
    Date of Patent: February 3, 2026
    Assignee: Infineon Technologies AG
    Inventors: Michael Kirsch, Patrick Hanekamp, Werner Robl, Klemens Prügl, Juergen Zimmer, Christoph Oswald
  • Publication number: 20250331246
    Abstract: A semiconductor device and a method of forming a semiconductor device are provided. In an embodiment, the semiconductor device comprises a device region, an edge termination region surrounding the device region, a first metal feature in the edge termination region, a first conformal ion diffusion barrier layer over the first metal feature, and a first conformal chemical protection layer over the first conformal ion diffusion barrier layer.
    Type: Application
    Filed: July 1, 2025
    Publication date: October 23, 2025
    Inventors: Carsten SCHAEFFER, Patrick HANEKAMP, Oliver HUMBEL, Angelika KOPROWSKI, Wolfgang LEHNERT, Francisco Javier SANTOS RODRIGUEZ
  • Patent number: 12363961
    Abstract: A semiconductor device and a method of forming a semiconductor device are provided. In an embodiment, the semiconductor device comprises a device region, an edge termination region surrounding the device region, a first metal feature in the edge termination region, a first conformal ion diffusion barrier layer over the first metal feature, and a first conformal chemical protection layer over the first conformal ion diffusion barrier layer.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: July 15, 2025
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Carsten Schaeffer, Patrick Hanekamp, Oliver Humbel, Angelika Koprowski, Wolfgang Lehnert, Francisco Javier Santos Rodriguez
  • Publication number: 20250189604
    Abstract: A sensor device contains a magnetic field sensor chip having a front face, a rear face and a side surface connecting the front face and the rear face. The magnetic field sensor chip has a sensor element which is arranged on the front face and is configured to detect a magnetic field component running parallel to the front face. The magnetic field sensor chip furthermore has multiple first contact pads arranged on the front face, wherein all of the first contact pads arranged on the front face are arranged at an edge of the magnetic field sensor chip lying between the front face and the side surface.
    Type: Application
    Filed: December 3, 2024
    Publication date: June 12, 2025
    Inventors: Patrick HANEKAMP, Andreas STRAßER, Horst THEUSS, Jürgen ZIMMER, Michael KIRSCH, Christian GEISSLER
  • Publication number: 20250057051
    Abstract: A layered structure includes a silicon-based substrate comprising a substrate surface; a titanium-copper seed layer arranged on the substrate surface, wherein the titanium-copper seed layer comprises a titanium layer and a copper layer, wherein the titanium layer is arranged on the substrate surface such that covalent bonds are formed between the titanium layer and silicon of the silicon-based substrate, and wherein the copper layer is arranged directly on the titanium layer, such that the titanium layer is arranged between the substrate surface and the copper layer; and a nickel-iron plating layer arranged directly on the copper layer of the titanium-copper seed layer such that the titanium-copper seed layer is arranged between the silicon-based substrate and the nickel-iron plating layer.
    Type: Application
    Filed: August 11, 2023
    Publication date: February 13, 2025
    Inventors: Michael KIRSCH, Patrick HANEKAMP, Werner ROBL, Klemens PRÜGL, Juergen ZIMMER, Christoph OSWALD
  • Publication number: 20240357947
    Abstract: An electronic circuit includes a substrate and a superconducting electronic circuit unit which is constructed on the substrate. The superconducting electronic circuit unit includes a capacitor with parallel plates opposite one another and a crystalline capacitor dielectric arranged between the parallel plates.
    Type: Application
    Filed: April 15, 2024
    Publication date: October 24, 2024
    Inventors: Jochen BRAUMÜLLER, Florian BRANDL, Michael KIRSCH, Wolfgang RABERG, Nicolas ARLT, Jash BANKER, Patrick HANEKAMP
  • Publication number: 20230154978
    Abstract: A semiconductor device and a method of forming a semiconductor device are provided. In an embodiment, the semiconductor device comprises a device region, an edge termination region surrounding the device region, a first metal feature in the edge termination region, a first conformal ion diffusion barrier layer over the first metal feature, and a first conformal chemical protection layer over the first conformal ion diffusion barrier layer.
    Type: Application
    Filed: November 15, 2021
    Publication date: May 18, 2023
    Inventors: Carsten SCHAEFFER, Patrick HANEKAMP, Oliver HUMBEL, Angelika KOPROWSKI, Wolfgang LEHNERT, Francisco Javier SANTOS RODRIGUEZ