Abstract: A superconducting device is described wherein the device comprises a substrate; a capacitor structure (604) and a superconducting inductor structure (602) disposed on the substrate, the capacitor structure an the superconducting inductor structure forming a superconducting microwave filter structure, in particular a low-pass filter, the superconducting inductor structure including a plurality of nanowires of a superconducting material, each of the plurality of nanowires being galvanically connected to one of a plurality of capacitor electrodes (608) forming the capacitor structure, wherein the cross-sectional dimensions of the plurality of nanowires are selected such that the kinetic inductance of each of the one or more nanowires is larger, preferably substantially larger, than the geometrical inductance of the nanowire.

Abstract: One embodiment of the invention provides a method for fabricating a self-aligned gate structure comprising forming at least one first trench having a first width and at least one second trench having a second width in a gate structure comprising a first metallic gate layer. The first width is smaller than the second width. The method comprises depositing at least one conformal dielectric layer on the first metallic gate layer. The dielectric layer completely fills the first trench and partially fills the second trench, such that a portion of the second trench is unfilled. The method comprises depositing a conformal second metallic gate layer on the dielectric layer. The second metallic gate layer fills the unfilled portion of the second trench. The method comprises removing portions of the second metallic gate layer to expose the dielectric layer. Remaining portions of the second metallic gate layer include self-aligned metallic gate electrodes.

Abstract: Embodiments of the present disclosure are directed to a side-gated fin field effect transistor configured as a scanning single electron transistor. In a non-limiting embodiment, a scanning single electron transistor includes a fin formed over a substrate. A source gate is formed over a first portion of the substrate that extends over a sidewall of the fin. A drain gate is formed over a second portion of the substrate that extends over the sidewall of the fin. A plunger gate is formed over a third portion of the substrate that extends over the sidewall of the fin. The plunger gate is positioned between the source gate and the drain gate. The plunger gate is etched back from a topmost surface of the fin such that a quantum dot formed in the fin is not screened by metallic materials in the plunger gate.

Abstract: One embodiment of the invention provides a method for fabricating a self-aligned gate structure comprising forming at least one first trench having a first width and at least one second trench having a second width in a gate structure comprising a first metallic gate layer. The first width is smaller than the second width. The method comprises depositing at least one conformal dielectric layer on the first metallic gate layer. The dielectric layer completely fills the first trench and partially fills the second trench, such that a portion of the second trench is unfilled. The method comprises depositing a conformal second metallic gate layer on the dielectric layer. The second metallic gate layer fills the unfilled portion of the second trench. The method comprises removing portions of the second metallic gate layer to expose the dielectric layer. Remaining portions of the second metallic gate layer include self-aligned metallic gate electrodes.

Abstract: A superconducting device is described wherein the device comprises a substrate; a capacitor structure (604) and a superconducting inductor structure (602) disposed on the substrate, the capacitor structure an the superconducting inductor structure forming a superconducting microwave filter structure, in particular a low-pass filter, the superconducting inductor structure including a plurality of nanowires of a superconducting material, each of the plurality of nanowires being galvanically connected to one of a plurality of capacitor electrodes (608) forming the capacitor structure, wherein the cross-sectional dimensions of the plurality of nanowires are selected such that the kinetic inductance of each of the one or more nanowires is larger, preferably substantially larger, than the geometrical inductance of the nanowire.

Abstract: Methods and apparatus of quantum information processing using quantum dots are provided. Electrons from a 2DEG are confined to the quantum dots and subjected to a magnetic field having a component directed parallel to the interface. Due to interfacial asymmetries, there is created an effective magnetic field that perturbs the energies of the spin states via an interfacial spin-orbit (SO) interaction. This SO interaction is utilized to controllably produce rotations of the electronic spin state, such as X-rotations of the electronic spin state in a double quantum dot (DQD) singlet-triplet (ST) qubit. The desired state rotations are controlled solely by the use of electrical pulses.