Patents by Inventor Patrick J. McCarthy
Patrick J. McCarthy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10075326Abstract: Method and apparatus for detecting a hung up and/or slow-running syscall without affecting the performance of the syscall. Before a syscall is started, a time stamp can be created at a memory address that is distinct from memory addresses to be used by the syscall. While a syscall thread handles the syscall operation, a separate monitor thread monitors the time stamp to track the length of time the syscall operation has been running. If the syscall thread operation exceeds a threshold time limit, then a flag can be sent to a network administrator to indicate that the syscall may be hung up and/or slow running.Type: GrantFiled: January 15, 2014Date of Patent: September 11, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael E. Aho, Thomas M. Gooding, Patrick J. McCarthy, Thomas E. Musta
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Patent number: 10069674Abstract: Method and apparatus for detecting a hung up and/or slow-running syscall without affecting the performance of the syscall. Before a syscall is started, a time stamp can be created at a memory address that is distinct from memory addresses to be used by the syscall. While a syscall thread handles the syscall operation, a separate monitor thread monitors the time stamp to track the length of time the syscall operation has been running. If the syscall thread operation exceeds a threshold time limit, then a flag can be sent to a network administrator to indicate that the syscall may be hung up and/or slow running.Type: GrantFiled: December 12, 2013Date of Patent: September 4, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael E. Aho, Thomas M. Gooding, Patrick J. McCarthy, Thomas E. Musta
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Publication number: 20150172160Abstract: Method and apparatus for detecting a hung up and/or slow-running syscall without affecting the performance of the syscall. Before a syscall is started, a time stamp can be created at a memory address that is distinct from memory addresses to be used by the syscall. While a syscall thread handles the syscall operation, a separate monitor thread monitors the time stamp to track the length of time the syscall operation has been running. If the syscall thread operation exceeds a threshold time limit, then a flag can be sent to a network administrator to indicate that the syscall may be hung up and/or slow running.Type: ApplicationFiled: January 15, 2014Publication date: June 18, 2015Applicant: International Business Machines CorporationInventors: Michael E. AHO, Thomas M. GOODING, Patrick J. MCCARTHY, Thomas E. MUSTA
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Publication number: 20150172095Abstract: Method and apparatus for detecting a hung up and/or slow-running syscall without affecting the performance of the syscall. Before a syscall is started, a time stamp can be created at a memory address that is distinct from memory addresses to be used by the syscall. While a syscall thread handles the syscall operation, a separate monitor thread monitors the time stamp to track the length of time the syscall operation has been running. If the syscall thread operation exceeds a threshold time limit, then a flag can be sent to a network administrator to indicate that the syscall may be hung up and/or slow running.Type: ApplicationFiled: December 12, 2013Publication date: June 18, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael E. Aho, Thomas M. Gooding, Patrick J. McCarthy, Thomas E. Musta
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Patent number: 8990450Abstract: Managing a direct memory access (‘DMA’) injection first-in-first-out (‘FIFO’) messaging queue in a parallel computer, including: inserting, by a messaging unit management module, a DMA message descriptor into the injection FIFO messaging queue; determining, by the messaging unit management module, the number of extra slots in an immediate messaging queue required to store DMA message data associated with the DMA message descriptor; and responsive to determining that the number of extra slots in the immediate message queue required to store the DMA message data is greater than one, inserting, by the messaging unit management module, a number of DMA dummy message descriptors into the injection FIFO messaging queue, wherein the number of DMA dummy message descriptors is at least as many as the number of extra slots in the immediate messaging queue that are required to store the DMA message data.Type: GrantFiled: May 14, 2012Date of Patent: March 24, 2015Assignee: International Business Machines CorporationInventors: Michael A. Blocksome, Todd A. Inglett, Patrick J. McCarthy, Joseph D. Ratterman, Brian E. Smith
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Patent number: 8930956Abstract: Methods, apparatuses, and computer program products for utilizing a kernel administration hardware thread of a multi-threaded, multi-core compute node of a parallel computer are provided. Embodiments include a kernel assigning a memory space of a hardware thread of an application processing core to a kernel administration hardware thread of a kernel processing core. A kernel administration hardware thread is configured to advance the hardware thread to a next memory space associated with the hardware thread in response to the assignment of the kernel administration hardware thread to the memory space of the hardware thread. Embodiments also include the kernel administration hardware thread executing an instruction within the assigned memory space.Type: GrantFiled: August 8, 2012Date of Patent: January 6, 2015Assignee: International Business Machines CorporationInventors: Michael A. Blocksome, Todd A. Inglett, Patrick J. McCarthy, Joseph D. Ratterman, Brian E. Smith
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Publication number: 20140047450Abstract: Methods, apparatuses, and computer program products for utilizing a kernel administration hardware thread of a multi-threaded, multi-core compute node of a parallel computer are provided. Embodiments include a kernel assigning a memory space of a hardware thread of an application processing core to a kernel administration hardware thread of a kernel processing core. A kernel administration hardware thread is configured to advance the hardware thread to a next memory space associated with the hardware thread in response to the assignment of the kernel administration hardware thread to the memory space of the hardware thread. Embodiments also include the kernel administration hardware thread executing an instruction within the assigned memory space.Type: ApplicationFiled: August 8, 2012Publication date: February 13, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael A. Blocksome, Todd A. Inglett, Patrick J. McCarthy, Joseph D. Ratterman, Brian E. Smith
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Publication number: 20130304948Abstract: Managing a direct memory access (‘DMA’) injection first-in-first-out (‘FIFO’) messaging queue in a parallel computer, including: inserting, by a messaging unit management module, a DMA message descriptor into the injection FIFO messaging queue; determining, by the messaging unit management module, the number of extra slots in an immediate messaging queue required to store DMA message data associated with the DMA message descriptor; and responsive to determining that the number of extra slots in the immediate message queue required to store the DMA message data is greater than one, inserting, by the messaging unit management module, a number of DMA dummy message descriptors into the injection FIFO messaging queue, wherein the number of DMA dummy message descriptors is at least as many as the number of extra slots in the immediate messaging queue that are required to store the DMA message data.Type: ApplicationFiled: May 14, 2012Publication date: November 14, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael A. Blocksome, Todd A. Inglett, Patrick J. Mccarthy, Josheph D. Ratterman, Brian E. Smith
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Patent number: 7979674Abstract: Executing MIMD programs on a SIMD machine, the SIMD machine including a plurality of compute nodes, each compute node capable of executing only a single thread of execution, the compute nodes initially configured exclusively for SIMD operations, the SIMD machine further comprising a data communications network, the network comprising synchronous data communications links among the compute nodes, including establishing one or more SIMD partitions, booting one or more SIMD partitions in MIMD mode; establishing a MIMD partition; executing by launcher programs a plurality of MIMD programs on two or more of the compute nodes of the MIMD partition; and re-executing a launcher program by an operating system on a compute node in the MIMD partition upon termination of the MIMD program executed by the launcher program.Type: GrantFiled: May 16, 2007Date of Patent: July 12, 2011Assignee: International Business Machines CorporationInventors: Todd A. Inglett, Patrick J. McCarthy, Amanda Peters, Thomas A. Budnik, Michael B. Mundy, Gordon G. Stewart
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Patent number: 7831802Abstract: Executing Multiple Instructions Multiple Data (‘MIMD’) programs on a Single Instruction Multiple Data (‘SIMD’) machine, the SIMD machine including a plurality of compute nodes, each compute node capable of executing only a single thread of execution, the compute nodes initially configured exclusively for SIMD operations, the SIMD machine further comprising a data communications network, the network comprising synchronous data communications links among the compute nodes, including establishing a SIMD partition comprising a plurality of the compute nodes; booting the SIMD partition in MIMD mode; executing by launcher programs a plurality of MIMD programs on compute nodes in the SIMD partition; and re-executing a launcher program by an operating system on a compute node in the SIMD partition upon termination of the MIMD program executed by the launcher program.Type: GrantFiled: July 19, 2007Date of Patent: November 9, 2010Assignee: International Business Machines CorporationInventors: Thomas A. Budnik, Alan J. King, Patrick J. McCarthy, Michael B. Mundy, Amanda Peters, James C. Sexton, Gordon G. Stewart
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Patent number: 7831803Abstract: Executing MIMD programs on a SIMD machine, including establishing on the SIMD machine a plurality of SIMD partitions; booting a first SIMD partition in MIMD mode; executing, on a compute node of the first SIMD partition booted in MIMD mode, a MIMD accelerator program; executing a SIMD program in a second SIMD partition, one instance of the SIMD program executing on each compute node of the second SIMD partition, each instance of the SIMD program carrying out a portion of the data processing effected by the SIMD program; and accelerating, by an instance of the SIMD program through the MIMD accelerator program, a portion of the data processing of the instance of the SIMD program.Type: GrantFiled: July 19, 2007Date of Patent: November 9, 2010Assignee: International Business Machines CorporationInventors: Todd A. Inglet, Alan J. King, Patrick J. McCarthy, Amanda Peters, James C. Sexton
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Patent number: 7814295Abstract: Executing MIMD programs on a SIMD machine, including establishing SIMD partitions on the SIMD machine; booting SIMD partitions in MIMD mode; executing MIMD programs on the compute nodes of a first SIMD partition booted in MIMD mode; re-executing a launcher program by an operating system on a compute node in the first SIMD partition booted in MIMD mode upon termination of the MIMD program executed by the launcher program; determining by a scheduler that the first SIMD partition booted in MIMD mode is required to establish a new SIMD partition large enough to run a SIMD program that is scheduled for execution; moving by the scheduler data processing operations from the first SIMD partition booted in MIMD mode to the second SIMD partition booted in MIMD mode; and establishing by the scheduler the new SIMD partition.Type: GrantFiled: May 18, 2007Date of Patent: October 12, 2010Assignee: International Business Machines CorporationInventors: Todd A. Inglett, Patrick J. McCarthy, Amanda Peters
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Publication number: 20100017655Abstract: Methods, apparatus, and products are disclosed for error recovery during execution of an application on a parallel computer that includes a plurality of compute nodes. Such error recovery includes: storing, by the application during execution on the nodes, application restore data in a restore buffer at predetermined points during execution of the application, the restore data specifying an execution state of the application at one or more points during application execution; encountering, by at least one of the nodes executing the application, a recoverable error during application execution; determining, by the application, the nodes affected by the recoverable error; restarting, by each of the affected nodes, execution of the application; retrieving, by the restarted application executing on each of the affected nodes, the restore data from the restore buffer; and continuing, by each affected node, execution of the application with the execution state specified by the retrieved restore data.Type: ApplicationFiled: July 16, 2008Publication date: January 21, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. GOODING, Patrick J. MCCARTHY, Michael B. MUNDY
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Patent number: 7552312Abstract: Methods, parallel computers, and products are provided for identifying messaging completion on a parallel computer. The parallel computer includes a plurality of compute nodes, the compute nodes coupled for data communications by at least two independent data communications networks including a binary tree data communications network optimal for collective operations that organizes the nodes as a tree and a torus data communications network optimal for point to point operations that organizes the nodes as a torus. Embodiments include reading all counters at each node of the torus data communications network; calculating at each node a current node value in dependence upon the values read from the counters at each node; and determining for all nodes whether the current node value for each node is the same as a previously calculated node value for each node.Type: GrantFiled: February 9, 2007Date of Patent: June 23, 2009Assignee: International Business Machines CorporationInventors: Charles J. Archer, Camesha R. Hardwick, Patrick J. McCarthy, Brian P. Wallenfelt
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Publication number: 20090024830Abstract: Executing Multiple Instructions Multiple Data (‘MIMD’) programs on a Single Instruction Multiple Data (‘SIMD’) machine, the SIMD machine including a plurality of compute nodes, each compute node capable of executing only a single thread of execution, the compute nodes initially configured exclusively for SIMD operations, the SIMD machine further comprising a data communications network, the network comprising synchronous data communications links among the compute nodes, including establishing a SIMD partition comprising a plurality of the compute nodes; booting the SIMD partition in MIMD mode; executing by launcher programs a plurality of MIMD programs on compute nodes in the SIMD partition; and re-executing a launcher program by an operating system on a compute node in the SIMD partition upon termination of the MIMD program executed by the launcher program.Type: ApplicationFiled: July 19, 2007Publication date: January 22, 2009Inventors: Thomas A. Budnik, Alan J. King, Patrick J. McCarthy, Michael B. Mundy, Amanda Peters, James C. Sexton, Gordon G. Stewart
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Publication number: 20090024831Abstract: Executing MIMD programs on a SIMD machine, including establishing on the SIMD machine a plurality of SIMD partitions; booting a first SIMD partition in MIMD mode; executing, on a compute node of the first SIMD partition booted in MIMD mode, a MIMD accelerator program; executing a SIMD program in a second SIMD partition, one instance of the SIMD program executing on each compute node of the second SIMD partition, each instance of the SIMD program carrying out a portion of the data processing effected by the SIMD program; and accelerating, by an instance of the SIMD program through the MIMD accelerator program, a portion of the data processing of the instance of the SIMD program.Type: ApplicationFiled: July 19, 2007Publication date: January 22, 2009Inventors: Todd A. Inglet, Alan J. King, Patrick J. McCarthy, Amanda Peters, James C. Sexton
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Publication number: 20090018907Abstract: There are methods and apparatus, including computer program products, for receiving an ad call from a client computing system, determining whether an instance of the ad call was previously-received, and if so, designating a first ad creative supplier associated with the previous instance of the ad call as ineligible to participate in an auction in which a second ad creative supplier is selected to serve an ad creative responsive to the ad call.Type: ApplicationFiled: July 11, 2007Publication date: January 15, 2009Applicant: Right Media, Inc.Inventors: Patrick J. McCarthy, David E. Barousse, JR., Luke Walsh, Brad Nelson, Joseph P. Garstka, Charles Brian O'Kelley
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Publication number: 20080288747Abstract: Executing MIMD programs on a SIMD machine, including establishing SIMD partitions on the SIMD machine; booting SIMD partitions in MIMD mode; executing MIMD programs on the compute nodes of a first SIMD partition booted in MIMD mode; re-executing a launcher program by an operating system on a compute node in the first SIMD partition booted in MIMD mode upon termination of the MIMD program executed by the launcher program; determining by a scheduler that the first SIMD partition booted in MIMD mode is required to establish a new SIMD partition large enough to run a SIMD program that is scheduled for execution; moving by the scheduler data processing operations from the first SIMD partition booted in MIMD mode to the second SIMD partition booted in MIMD mode; and establishing by the scheduler the new SIMD partition.Type: ApplicationFiled: May 18, 2007Publication date: November 20, 2008Inventors: Todd A. Inglett, Patrick J. McCarthy, Amanda Peters
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Publication number: 20080288746Abstract: Executing MIMD programs on a SIMD machine, the SIMD machine including a plurality of compute nodes, each compute node capable of executing only a single thread of execution, the compute nodes initially configured exclusively for SIMD operations, the SIMD machine further comprising a data communications network, the network comprising synchronous data communications links among the compute nodes, including establishing one or more SIMD partitions, booting one or more SIMD partitions in MIMD mode; establishing a MIMD partition; executing by launcher programs a plurality of MIMD programs on two or more of the compute nodes of the MIMD partition; and re-executing a launcher program by an operating system on a compute node in the MIMD partition upon termination of the MIMD program executed by the launcher program.Type: ApplicationFiled: May 16, 2007Publication date: November 20, 2008Inventors: Todd A. Inglett, Patrick J. McCarthy, Amanda Peters
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Publication number: 20080195840Abstract: Methods, parallel computers, and products are provided for identifying messaging completion on a parallel computer. The parallel computer includes a plurality of compute nodes, the compute nodes coupled for data communications by at least two independent data communications networks including a binary tree data communications network optimal for collective operations that organizes the nodes as a tree and a torus data communications network optimal for point to point operations that organizes the nodes as a torus. Embodiments include reading all counters at each node of the torus data communications network; calculating at each node a current node value in dependence upon the values read from the counters at each node; and determining for all nodes whether the current node value for each node is the same as a previously calculated node value for each node.Type: ApplicationFiled: February 9, 2007Publication date: August 14, 2008Inventors: Charles J. Archer, Camesha R. Hardwick, Patrick J. McCarthy, Brian P. Wallenfelt