Patents by Inventor Patrick J. Naughton

Patrick J. Naughton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5651107
    Abstract: A central processing unit (CPU) is provided and is coupled to a display for displaying graphic and other data in multiple overlapping windows. The CPU is further coupled to one or more input devices which permits a user to selectively position a cursor and input and manipulate data within each of the windows on the display. The windows include defined areas having window features such as text, icons and buttons corresponding to functions to be executed by the CPU. Multiple applications may be executed concurrently by the CPU such that each application is associated with one or more windows. Each display element ("pixel") comprising the display is represented by multiple bits in a computer frame buffer memory coupled to the CPU. An alpha value (.alpha.) is associated with the intensity of each pixel of the display such that multiple images may be blended in accordance with a predefined formula utilizing the alpha values.
    Type: Grant
    Filed: August 16, 1994
    Date of Patent: July 22, 1997
    Assignee: Sun Microsystems, Inc.
    Inventors: Edward H. Frank, Patrick J. Naughton, James Arthur Gosling, John C. Liu
  • Patent number: 5519825
    Abstract: Full-motion animation video is displayed in a computer system through use of sprite objects. The sprite objects define the images on the output display, and the locations of the sprite objects are changed to create the animation. The computer system includes three areas of physical memory assigned the status of a front buffer, a back buffer, and a cache buffer. The front buffer stores a frame currently displayed on the output display. The cache buffer is utilized to store a subset of the sprite objects so that all sprite objects need not be rendered for each frame of animation. The contents of the cache buffer are copied to the back buffer during display of the front buffer. To display a subsequent frame, the front and back buffers are switched. A cache buffer permits display of full-motion animation by minimizing use of processor and computer resources.
    Type: Grant
    Filed: November 16, 1993
    Date of Patent: May 21, 1996
    Assignee: Sun Microsystems, Inc.
    Inventors: Patrick J. Naughton, James A. Gosling
  • Patent number: 5512918
    Abstract: A method and apparatus for quickly copying a first frame region into a second frame region. A video memory array comprising a plurality of video random access memory devices is divided into at least two frame regions. A background image is rendered by a central processing unit into a background frame region within the video memory array. The central processing unit then requests the background image in the background frame region to be copied into a new frame region in the video memory array. A dedicated circuit copies the entire background image in the background frame region into the new frame region. The dedicated circuit operates by using a serial data register within each video random access memory device during the vertical retrace period of a video timing signal. The dedicated circuit performs the background frame copy without requiring any processing resources from the central processing unit.
    Type: Grant
    Filed: October 13, 1994
    Date of Patent: April 30, 1996
    Assignee: Sun Microsystems, Inc.
    Inventors: Craig S. Forrest, Edward H. Frank, Patrick J. Naughton