Patents by Inventor Patrick J. Pratt
Patrick J. Pratt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8189717Abstract: A slot-based radio signal at a carrier frequency is received, the radio signal including successive frames, each frame including a set of reception time slots, to producing an input signal. A local oscillator signal is produced, In-phase and Quadrature components having a local oscillator frequency. The input signal is mixed with the local oscillator signal and Intermediate Frequency signal In-phase and Quadrature components are produced. The local oscillator frequency of the local oscillator signal changes relative to the carrier frequency of the input signal multiple times during the reception time slots of each of the frames between two frequency values. One frequency is greater and the other frequency is smaller than the carrier frequency. Frequencies of Intermediate Frequency components are selectively passed within a low Intermediate Frequency range and frequencies outside said low Intermediate Frequency range are rejected so as to produce filtered signal components.Type: GrantFiled: February 15, 2010Date of Patent: May 29, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Nadim Khlat, Conor O'Keefe, Patrick J. Pratt
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Patent number: 8014737Abstract: A wireless communication unit comprises a transmitter having an analogue feedback power control loop with an input and a power amplifier having a power amplifier output, where the analogue feedback power control loop is arranged to feedback a signal to the input to set an output power level of the transmitter. The wireless communication unit further comprises an outer digital loop operably coupled from the power amplifier output to the transmitter. In this manner, the inner analogue loop is used to linearise a response obtained from the power amplifier and an outer digital loop wherein the outer digital loop controls the inner analogue loop with regard to saturation detection and correction as well as facilitating multi-mode operation of the wireless communication unit.Type: GrantFiled: December 23, 2004Date of Patent: September 6, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Patrick J. Pratt, Michael A. Milyard, Daniel B. Schwartz, Philip C. Warder
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Patent number: 7991367Abstract: A wireless communication unit comprises a transmitter having an analogue feedback power control loop having a power control function arranged to set an output power level of the transmitter. The power control function comprises a predictor sub-system arranged to reduce sensitivity to loop latency of the analogue feedback power control loop. The use of a predictor sub-system provides reduced sensitivity to loop latency, gain variations and delay.Type: GrantFiled: December 23, 2004Date of Patent: August 2, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Patrick J. Pratt, Michael A. Milyard, Daniel B. Schwartz, Philip C. Warder
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Publication number: 20110182335Abstract: A calibration signal generator for use in a balancing circuit calibration device in a radio receiver, the calibration signal generator comprising: a means of amplifying a clocking signal from a clocking signal generator to provide a first calibration signal; a means of generating a second calibration signal from the clocking signal, the first and second calibration signals being transmissible to a one or more mixing circuits in the balancing circuit calibration device; and a means synchronising the operation of other circuit elements in the balancing circuit calibration device with the clocking signal; characterised in that the clocking signal generator is present in the radio receiver and used therein for other functions.Type: ApplicationFiled: January 22, 2007Publication date: July 28, 2011Applicant: Freescale Semiconductor, Inc.Inventors: Patrick J. Pratt, Hari Thirumoorthy, Conor O'Keeffe
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Publication number: 20100144301Abstract: A slot-based low Intermediate Frequency (‘IF’) radio receiver comprises an IF local oscillator (3, 5, 19) for producing I and Q IF local oscillator signal components in phase quadrature, I and Q mixer channels (4, 6) for mixing the input signal with the I and Q IF local oscillator signal components to produce I and Q IF signal components. The IF local oscillator (3, 5, 19) includes frequency alternation means (20) for causing the IF local oscillator frequency to alternate a plurality of times during each frame between first and second values, one of which is greater and the other smaller than the desired carrier frequency of the input signal so as to reduce the effect of adjacent and alternate interferers. The phase of the baseband local oscillator (12, 13) is alternated in synchronism with the alternation of the IF local oscillator frequency.Type: ApplicationFiled: February 15, 2010Publication date: June 10, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: NADIM KHLAT, CONOR O'KEEFE, PATRICK J. PRATT
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Patent number: 7697632Abstract: A slot-based low Intermediate Frequency (‘IF’) radio receiver comprises an IF local oscillator for producing I and Q IF local oscillator signal components in phase quadrature, and I and Q mixer channels for mixing the input signal with the I and Q IF local oscillator signal components to produce I and Q IF signal components. The IF local oscillator frequency alternates a plurality of times during each frame between first and second values, one of which is greater and the other smaller than the desired carrier frequency of the input signal so as to reduce the effect of adjacent and alternate interferers. The phase of the baseband local oscillator is alternated in synchronism with the alternation of the IF local oscillator frequency.Type: GrantFiled: December 22, 2004Date of Patent: April 13, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Nadim Khlat, Conor O'Keefe, Patrick J. Pratt
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Publication number: 20100009642Abstract: A wireless communication unit comprises a transmitter having an analogue feedback power control loop with an input and a power amplifier having a power amplifier output, where the analogue feedback power control loop is arranged to feedback a signal to the input to set an output power level of the transmitter. The wireless communication unit further comprises an outer digital loop operably coupled from the power amplifier output to the transmitter. In this manner, the inner analogue loop is used to linearise a response obtained from the power amplifier and an outer digital loop wherein the outer digital loop controls the inner analogue loop with regard to saturation detection and correction as well as facilitating multi-mode operation of the wireless communication unit.Type: ApplicationFiled: December 23, 2004Publication date: January 14, 2010Applicant: Freescale Semiconductor, Inc.Inventors: Patrick J. Pratt, Michael A. Milyard, Daniel B. Schwartz, Philip C. Warder
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Publication number: 20090280758Abstract: A wireless communication unit comprises a transmitter having an analogue feedback power control loop having a power control function arranged to set an output power level of the transmitter. The power control function comprises a predictor sub-system arranged to reduce sensitivity to loop latency of the analogue feedback power control loop. The use of a predictor sub-system provides reduced sensitivity to loop latency, gain variations and delay.Type: ApplicationFiled: December 23, 2004Publication date: November 12, 2009Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Patrick J. Pratt, Michael A. Milyard, Daniel B. Schwartz, Philip C. Warder
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Patent number: 7532696Abstract: A calibration device for a phase locked loop arranged to generate an output frequency based upon a first frequency range of an input signal applied to a first input and a second frequency range of the input signal applied to a second input, the calibration phase locked loop synthesizer device comprising an estimator arranged to use a two dimensional estimation algorithm with a signal value indicative of a mismatch between the first input path and the second input path to determine an estimate of the mismatch to allow matching of the first input path and the second input path.Type: GrantFiled: November 18, 2004Date of Patent: May 12, 2009Assignee: Freescale Semiconductor, Inc.Inventors: Patrick J. Pratt, Michael A. Milyard, Louis M. Nigra, Daniel B. Schartz