Patents by Inventor Patrick J. Variot

Patrick J. Variot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250253208
    Abstract: A device package comprising an integrated cooling assembly. The integrated cooling assembly comprises a first semiconductor device, a cold plate, and a second semiconductor device attached therebetween. The cold plate comprises a manifold attached to the second semiconductor device. The manifold comprising an inlet opening and an outlet opening, a support feature extending downwardly from the manifold to the first semiconductor device, and a coolant channel coupling the inlet opening and the outlet opening. The coolant channel extends through a portion of the support feature proximate to the first semiconductor device.
    Type: Application
    Filed: July 30, 2024
    Publication date: August 7, 2025
    Inventors: Belgacem Haba, Rajesh Katkar, Patrick J. Variot, Hong Shen
  • Patent number: 6117695
    Abstract: An apparatus and method are presented for testing an adhesive layer formed between an integrated circuit and a plate, wherein the plate may be semiconductor device package substrate or a heat spreader. The apparatus includes a pull stud and a pull arm. The pull stud has an upper portion and a lower portion, wherein the lower portion is attached to a surface of the integrated circuit opposite the plate. The upper portion of the pull stud may be, for example, a tapered cylinder having a large end and a small end. The small end meets the lower portion of the pull stud. The pull arm has two opposed ends and at least one bracket for receiving a force. One of the pull arm ends has a "V"-shaped opening surrounded by a lip which receives the upper portion of the pull stud. During use, the lip contacts and retains the upper portion of the pull stud. The opening has an upper wall, and an upper surface of the pull stud contacts the upper wall when the upper portion of the pull stud is inserted into the opening.
    Type: Grant
    Filed: May 8, 1998
    Date of Patent: September 12, 2000
    Assignee: LSI Logic Corporation
    Inventors: Adrian S. Murphy, Manickam Thavarajah, Patrick J. Variot