Patents by Inventor Patrick John Zeelen

Patrick John Zeelen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DRIVER CIRCUIT FOR A POWER STAGE OF A CLASS-D AMPLIFIER
    Publication number: 20170063307
    Abstract: Embodiments of a driver circuit for a power stage of a class-D amplifier and a class-D amplifier are described. In one embodiment, a driver circuit for a power stage of a class-D amplifier includes serially connected transistor devices connected to a gate terminal of a power transistor of the power stage of the class-D amplifier, a voltage generator connected between a gate terminal of a first transistor device of the serially connected transistor devices and a source terminal of the power transistor, and a current multiplier connected between the gate terminal of the power transistor and one of a source terminal and a drain terminal of the first transistor device. The current multiplier is configured to produce an output current that is proportional to a current at the one of the source terminal and the drain terminal of the first transistor device.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Applicant: NXP B.V.
    Inventors: Gertjan van Holland, Patrick John Zeelen, Jacobus Govert Sneep
  • Driver circuit for a power stage of a class-D amplifier
    Patent number: 9571038
    Abstract: Embodiments of a driver circuit for a power stage of a class-D amplifier and a class-D amplifier are described. In one embodiment, a driver circuit for a power stage of a class-D amplifier includes serially connected transistor devices connected to a gate terminal of a power transistor of the power stage of the class-D amplifier, a voltage generator connected between a gate terminal of a first transistor device of the serially connected transistor devices and a source terminal of the power transistor, and a current multiplier connected between the gate terminal of the power transistor and one of a source terminal and a drain terminal of the first transistor device. The current multiplier is configured to produce an output current that is proportional to a current at the one of the source terminal and the drain terminal of the first transistor device.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 14, 2017
    Assignee: NXP B.V.
    Inventors: Gertjan van Holland, Patrick John Zeelen, Jacobus Govert Sneep