Abstract: A method, (e.g., a computer-implemented method), of generating a production plan is provided. The method includes obtaining one or more product and/or production characteristics, (e.g., a production content, a production time, and/or a production quantity, for example, in a E-BOM, M-BOM, and/or CAD file format), for a product to be manufactured. The method further includes determining, by a rule engine, based on the one or more product and/or production characteristics, one or more library elements from a plurality of library elements, wherein each library element includes one or more process descriptions relating to the characteristic. The method further includes arranging, by the rule engine, the one or more process descriptions into a production plan.

Abstract: Various aspects of the disclosed technology relate to training and applying a machine learning model for defect pattern detection. Defect pattern variants of one or more defect patterns are generated. The one or more defect patterns are extracted from wafer maps of wafers having at least systematic defects. Each of the generated defect pattern variants is superimposed on wafer maps of wafers having no systematic defects to generate positive training data of wafer maps, which are included in a training dataset. Based on the training dataset, a trained machine-learning model for recognizing known defect patterns on wafer maps is derived.

Abstract: Various aspects of the disclosed technology relate to training and applying a machine learning model for defect pattern detection. Defect pattern variants of one or more defect patterns are generated. The one or more defect patterns are extracted from wafer maps of wafers having at least systematic defects. Each of the generated defect pattern variants is superimposed on wafer maps of wafers having no systematic defects to generate positive training data of wafer maps, which are included in a training dataset. Based on the training dataset, a trained machine-learning model for recognizing known defect patterns on wafer maps is derived.