Abstract: A lanthanide is combined with a medium to be tested for endospores. The dipicolinic acid released from the endospores binds the lanthanides, which have distinctive emission (i.e., luminescence) spectra, and are detected using photoluminescence. The concentration of spores is determined by preparing a calibration curve generated from photoluminescence spectra of lanthanide complex mixed with spores of a known concentration. A lanthanide complex is used as the analysis reagent, and is comprised of lanthanide ions bound to multidentate ligands that increase the dipicolinic acid binding constant through a cooperative binding effect with respect to lanthanide chloride. The resulting combined effect of increasing the binding constant and eliminating coordinated water and multiple equilibria increase the sensitivity of the endospore assay by an estimated three to four orders of magnitude over prior art of endospore detection based on lanthanide luminescence.

Abstract: A DAC architecture is described. The architecture is specifically adapted to provided an analog voltage output based on a digital input word. The architecture includes a resistor ladder configuration sub-divisible into a first component, adapted to convert a lower part of the input word, and a second component adapted to convert an upper part of the input word. The DAC is calibrated such that the first component can be used to tune the output of the second component on selection of specific segment from the second component.

Abstract: A circuit (1) comprising eight DACs (2a to 2h), the analog outputs of which are applied to the non-inverting inputs (6) of corresponding op-amps (7a to 7h) for gaining up the analog output voltage from the corresponding DAC (2). The op-amps (7) are identical, and are configured in a non-inverting mode with a closed loop gain of two provided by first and second resistors (R1) and (R2). Primary outputs (8) of the op-amps (7) are coupled to output pins (9a to 9h) of the circuit (1). The second resistors (R2) couple primary inverting inputs (12) of the op-amps (7) to a common voltage reference rail (14), which is coupled to a true ground reference pin (15) through a coupling wire (16) which exhibit a combined inherent resistance (Rp). The voltage reference on the common voltage reference rail (14) varies with time as the output signals of the op-amps (7) vary, and would thus result in cross-talk between the DACs (2a to 2h).

Abstract: A multi-channel DAC having a digital input port (2) for receiving digital input codes and a plurality of analogue output terminals (OUT1 to OUTN) on channels (CH1 to CHN) on which corresponding analogue signals are outputted, comprises a primary DAC (3) which receives the digital input codes from the input port (2). Analogue signals from the primary DAC (3) are selectively and sequentially sampled onto infinite sample and hold circuits (SH1 to SHN) of the channel (CH1 to CHN) through primary switches PS1 to PSN) under the control of a primary control circuit (5). Each infinite sample and hold circuit (SH1 to SHN) comprises a secondary DAC (10) which outputs an analogue signal which closely approximates to the sampled analogue signal from the primary DAC (3) and which is held on the corresponding output terminal (OUT1 to OUTN).

Abstract: An infinite sample-and-hold circuit which employs a DAC and an ADC coupled with a mode control circuit. In acquisition mode, the mode control circuit connects the analog input signal to the ADC. The ADC drives the DAC and when the DAC output equals the analog input, the mode control circuit disconnects the analog input and the DAC drives the output in hold mode. The mode control circuit preferably includes a comparator/buffer circuit including switching circuitry. The ADC is preferably of the successive approximation type. The comparator/buffer is used in two modes: (1) open loop, as a comparator, and (2) closed loop, as a buffer. During acquisition, the comparator mode is used, while in hold mode the buffer mode is used. The utilization of the same amplifier to provide both functions allows cancellation of offset errors otherwise introduced by the comparator and buffer, at least to a first order.

Abstract: An electrical connector assembly is provided for mounting on a printed circuit board which includes at least a pair of mounting post-receiving holes and at least one solder tail-receiving aperture. The assembly includes a housing having at least a pair of mounting posts for positioning in the holes in the printed circuit board. At least one contact member is mounted on the housing and includes a solder tail for positioning in the aperture in the printed circuit board. The solder tail has a generally straight side and a projecting hook on an opposite side for retaining the connector assembly on the printed circuit board. The width of the solder tail between the straight side and the outermost point of the hook on the opposite side is no greater than the width of the aperture, and the centerline of the solder tail between its sides is offset, in the direction of the hook, relative to the centerline of the aperture when the mounting posts are aligned with the holes in the printed circuit board.