Patents by Inventor Patrick Klersy

Patrick Klersy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Electrically programmable memory element with reduced area of contact and method for making same
    Publication number: 20050201136
    Abstract: An electrically programmable memory element comprising a programmable resistance memory material. In one embodiment, the memory element has a cup-shaped electrical contact. A portion of the rim of the electrical contact is recessed below another portion of the rim.
    Type: Application
    Filed: May 5, 2005
    Publication date: September 15, 2005
    Inventors: Tyler Lowrey, Stephen Hudgens, Patrick Klersy
  • Electrically programmable memory element with reduced area of contact and method for making same
    Patent number: 6943365
    Abstract: An electrically operated programmable resistance memory element having a conductive layer as an electrical contact. The conductive layer has a raised portion extending from an edge of the layer to an end adjacent the memory material.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: September 13, 2005
    Assignee: Ovonyx, Inc.
    Inventors: Tyler Lowrey, Stephen J. Hudgens, Patrick Klersy
  • Method for making programmable resistance memory element
    Patent number: 6927093
    Abstract: A method of making an electrically operated programmable resistance memory element. A sidewall spacer is used as a mask to form a raised portion of a conductive layer. A programmable resistance material is formed in electrical contact with the raised portion.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: August 9, 2005
    Assignee: Ovonyx, Inc.
    Inventors: Tyler Lowrey, Patrick Klersy, Stephen J. Hudgens, Jon Maimon
  • Programmable resistance memory element with layered memory material
    Patent number: 6872963
    Abstract: A programmable resistance memory element comprising alternating layers of programmable resistance material layers and stabilizing layers. The stabilizing layers may include metallic titanium or a titanium alloy. The stabilizing layers may include a telluride, such as titanium telluride.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: March 29, 2005
    Assignee: Ovonyx, Inc.
    Inventors: Sergey A. Kostylev, Wolodymyr Czubatyj, Patrick Klersy
  • Electrically programmable memory element
    Publication number: 20050062132
    Abstract: A programmable resistance memory element including a memory material which is raised above a semiconductor substrate by a dielectric layer.
    Type: Application
    Filed: November 5, 2004
    Publication date: March 24, 2005
    Inventors: Patrick Klersy, Tyler Lowrey
  • Programmable resistance memory element with multi-regioned contact
    Publication number: 20050003602
    Abstract: An electrically programmable memory element comprising a programmable resistance material and an electrical contact. The electrical contact having at least two portion wherein the first portion has a higher resistivity than the second portion.
    Type: Application
    Filed: July 15, 2004
    Publication date: January 6, 2005
    Inventors: Tyler Lowrey, Stephen Hudgens, Patrick Klersy
  • Electrically programmable memory element with improved contacts
    Publication number: 20040256694
    Abstract: An electrically operated memory element comprising a phase-change memory material, a first electrical contact and a second electrical contact. At least one of the electrical contact being a thin-film layer having a sidewall electrical coupled to the memory material.
    Type: Application
    Filed: May 19, 2004
    Publication date: December 23, 2004
    Inventors: Sergey A. Kostylev, Stanford R. Ovshinsky, Wolodymyr Czubatyi, Patrick Klersy, Boil Pashmakov
  • Electrically programmable memory element with raised pore
    Patent number: 6815705
    Abstract: A programmable resistance memory element including a pore of memory material which is raised above a semiconductor substrate by a dielectric layer. The pore may be formed with the use of sidewall spacers.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: November 9, 2004
    Assignee: Ovonyx, Inc.
    Inventors: Patrick Klersy, Tyler Lowrey
  • Metal structure for a phase-change memory device
    Patent number: 6797979
    Abstract: The invention relate to a damascene chalcogenide memory cell structure. The damascene chalcogenide memory cell structure is fabricated under conditions that simplify previous process flows. The damascene chalcogenide memory cell structure also prevents volatilization of the chalcogenide memory material.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: September 28, 2004
    Assignee: Intel Corporation
    Inventors: Chien Chiang, Jong-Won Lee, Patrick Klersy
  • Method for making programmable resistance memory element
    Publication number: 20040175857
    Abstract: A method of making an electrically operated programmable resistance memory element. A sidewall spacer is used as a mask to form a raised portion of a conductive layer. A programmable resistance material is formed in electrical contact with the raised portion.
    Type: Application
    Filed: March 16, 2004
    Publication date: September 9, 2004
    Inventors: Tyler Lowrey, Patrick Klersy, Stephen J. Hudgens, Jon Maimon
  • Method for making programmable resistance memory element
    Patent number: 6750079
    Abstract: A method of making an electrically operated programmable resistance memory element. A sidewall spacer is used as a mask to form raised portions on an edge of a conductive sidewall layer. The modified conductive sidewall layer is used as an electrode for the memory element.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: June 15, 2004
    Assignee: Ovonyx, Inc.
    Inventors: Tyler Lowrey, Patrick Klersy, Stephen J. Hudgens, Jon Maimon
  • Programmable resistance memory element with layered memory material
    Publication number: 20040026730
    Abstract: A programmable resistance memory element comprising alternating layers of programmable resistance material layers and stabilizing layers. The stabilizing layers may include metallic titanium or a titanium alloy. The stabilizing layers may include a telluride, such as titanium telluride.
    Type: Application
    Filed: August 8, 2002
    Publication date: February 12, 2004
    Inventors: Sergey A. Kostylev, Wolodymyr Czubatyj, Patrick Klersy
  • Metal structure for a phase-change memory device
    Publication number: 20030193063
    Abstract: The invention relates to a damascene chalcogenide memory cell structure. The damascene chalcogenide memory cell structure is fabricated under conditions that simplify previous process flows. The damascene chalcogenide memory cell structure also prevents volatilization of the chalcogenide memory material.
    Type: Application
    Filed: April 17, 2003
    Publication date: October 16, 2003
    Inventors: Chien Chiang, Jong-Won Lee, Patrick Klersy
  • Method for making small pore for use in programmable resistance memory element
    Patent number: 6613604
    Abstract: A method for making a small pore. The defined pore is useful for the fabrication of programmable resistance memory elements. The programmable resistance memory material may be a chalcogenide.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: September 2, 2003
    Assignee: Ovonyx, Inc.
    Inventors: Jon Maimon, Patrick Klersy
  • Metal structure for a phase-change memory device
    Patent number: 6569705
    Abstract: The invention relates to a damascene chalcogenide memory cell structure. The damascene chalcogenide memory cell structure is fabricated under conditions that simplify previous process flows. The damascene chalcogenide memory cell structure also prevents volatilization of the chalcogenide memory material.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: May 27, 2003
    Assignee: Intel Corporation
    Inventors: Chien Chiang, Jong-Won Lee, Patrick Klersy
  • Compositionally modified resistive electrode
    Patent number: 6555860
    Abstract: An apparatus comprising a volume of memory material and a pair of spacedly disposed conductors. An electrode coupled to the volume of memory material and disposed between the volume of memory material and one conductor. The electrode comprises a first portion having a first thermal coefficient of resistivity and a second portion having a different second thermal coefficient of resistivity. A method including modifying the thermal coefficient of resisting of a portion of an electrode.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: April 29, 2003
    Assignee: Intel Corporation
    Inventors: Tyler A. Lowrey, Stephen J. Hudgens, Patrick Klersy
  • Programmable resistance memory element and method for making same
    Publication number: 20030075778
    Abstract: A programmable resistance memory element. The active volume of memory material is made small by the presence of a small area of contact between the conductive material and the memory material. The area of contact is created by forming a region of conductive material and an intersecting sidewall layer of the memory material. The region of conductive material is preferably a sidewall layer of conductive material.
    Type: Application
    Filed: October 10, 2002
    Publication date: April 24, 2003
    Inventor: Patrick Klersy
  • Method for making small pore for use in programmable resistance memory element
    Publication number: 20030027398
    Abstract: A method for making a small pore. The defined pore is useful for the fabrication of programmable resistance memory elements. The programmable resistance memory material may be a chalcogenide.
    Type: Application
    Filed: September 19, 2001
    Publication date: February 6, 2003
    Inventors: Jon Maimon, Patrick Klersy
  • Metal structure for a phase-change memory device
    Publication number: 20020080647
    Abstract: The invention relates to a damascene chalcogenide memory cell structure. The damascene chalcogenide memory cell structure is fabricated under conditions that simplify previous process flows. The damascene chalcogenide memory cell structure also prevents volatilization of the chalcogenide memory material.
    Type: Application
    Filed: December 21, 2000
    Publication date: June 27, 2002
    Inventors: Chien Chiang, Jong-Won S. Lee, Pat Klersy, Patrick Klersy
  • Method for making programmable resistance memory element
    Publication number: 20020045323
    Abstract: A method of making an electrically operated programmable resistance memory element. A sidewall spacer is used as a mask to form raised portions on an edge of a conductive sidewall layer. The modified conductive sidewall layer is used as an electrode for the memory element.
    Type: Application
    Filed: June 26, 2001
    Publication date: April 18, 2002
    Inventors: Tyler Lowrey, Patrick Klersy, Stephen J. Hudgens, Jon Maimon