Patents by Inventor Patrick Krüger

Patrick Krüger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12575341
    Abstract: The invention relates to a method for annealing of at least two wafers bonded via low-temperature direct bonding comprising heating the bonded wafers up to a first annealing temperature in the range of 100° C. to 500° C., preferably 150° C. to 400° C., even more preferred 150° C. to 200° C., holding the first annealing temperature in a range of 1 to 4 hours, preferably 1 to 3 hours, cooling down the bonded wafers to room temperature, re-heating the bonded wafers to a second annealing temperature in the range of 100° C. to 500° C., preferably 150° C. to 400° C., even more preferred 150° C. to 200° C., and cooling down the bonded wafers to room temperature.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: March 10, 2026
    Assignee: IHP GMBH—INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS / LEIBNIZ-INSTITUT FUR INNOVATIVE MIKRO
    Inventors: Patrick Krüger, Thomas Voss, Matthias Wietstruck
  • Publication number: 20250022839
    Abstract: The present invention relates to a method of performing collective die-to-wafer bonding. The method comprises the steps of: providing a carrier wafer having a back side and a bonding side opposite the back side and comprising on the bonding side one or more pockets that each are configured for accommodating a die, respectively, providing a target substrate comprising an integrated circuit, hereinafter IC, and one or more target bonding pads for connecting the one or more dies to the IC, placing one or more dies in the one or more pockets, respectively, and bonding the one or more dies placed in the one or more pockets to the tar-get substrate by bringing the one or more dies into contact with the one or more target bonding pads.
    Type: Application
    Filed: July 11, 2024
    Publication date: January 16, 2025
    Inventors: Sebastian SCHULZE, Matthias WIETSTRUCK, Thomas VOß, Patrick KRÜGER
  • Publication number: 20230187301
    Abstract: A fan-out wafer-level package comprising at least one integrated circuit, an internal heat spreader thermally connected to the integrated circuit either directly or via an interface layer having a thickness in sub-?m range preferably in the range of 20 nm to 500 nm, wherein the internal heat spreader is embedded in the fan-out wafer-level package.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 15, 2023
    Inventors: Matthias WIETSTRUCK, Gerhard KAHMEN, Patrick KRÜGER, Thomas VOß, Matteo STOCCHI
  • Publication number: 20230030354
    Abstract: The invention relates to a method for annealing of at least two wafers bonded via low-temperature direct bonding comprising heating the bonded wafers up to a first annealing temperature in the range of 100° C. to 500° C., preferably 150° C. to 400° C., even more preferred 150° C. to 200° C., holding the first annealing temperature in a range of 1 to 4 hours, preferably 1 to 3 hours, cooling down the bonded wafers to room temperature, re-heating the bonded wafers to a second annealing temperature in the range of 100° C. to 500° C., preferably 150° C. to 400° C., even more preferred 150° C. to 200° C., and cooling down the bonded wafers to room temperature.
    Type: Application
    Filed: July 27, 2022
    Publication date: February 2, 2023
    Inventors: Patrick Krüger, Thomas Voss, Matthias Wietstruck