Abstract: An orchestration controller in a storage solution may establish namespaces, assign each namespace to a host, and establish software-defined storage controllers to handle input-output operations between the hosts and the namespaces. Each namespace is assigned to a given host and the input-output operations to and from the namespace are handled by a specific primary software-defined storage controller. In response to failure of the software defined controller, a secondary software-defined storage controller will take over handling of the input-output operations to and from the namespace. Also, in response to the failure of the software-defined storage controller, the host will direct subsequent input-output operations destined for the namespace to the secondary software-defined storage controller.

Abstract: Topology discovery between compute nodes and interconnect switches including creating, on an interconnect switch, a virtual topology discovery device for a first port, wherein the interconnect switch is coupled to a compute node via the first port, and wherein the virtual topology discovery device comprises a port identifier for the first port; mapping the virtual topology discovery device to the first port; receiving an inventory request from the compute node via the first port; routing the inventory request to the virtual topology discovery device for the first port; and sending, from the virtual topology discovery device for the first port, the port identifier to the compute node.

Abstract: An orchestration controller in a storage solution may establish namespaces, assign each namespace to a host, and establish software-defined storage controllers to handle input-output operations between the hosts and the namespaces. Each namespace is assigned to a given host and the input-output operations to and from the namespace are handled by a specific primary software-defined storage controller. In response to failure of the software defined controller, a secondary software-defined storage controller will take over handling of the input-output operations to and from the namespace. Also, in response to the failure of the software-defined storage controller, the host will direct subsequent input-output operations destined for the namespace to the secondary software-defined storage controller.

Abstract: An apparatus for secure multiple server access to a non-volatile storage device is disclosed. A method and storage device product also perform the functions of the apparatus. An apparatus includes a storage device with three or more ports. Each port includes at least one lane and each port is configured to connect to a different server over the at least one lane of the port. The storage device includes a storage controller in the storage device for each port. Each storage controller controls storage to non-volatile storage of the storage device. The storage device includes a logical namespace assigned to each port. Each logical namespace is assigned to a portion of the non-volatile storage of the storage device. The logical namespace of a first port of the three or more ports is inaccessible to a second port of the three or more ports.

Abstract: Shared virtual media in a composed system, including generating, in a switch of a fabric of the composed system, a virtual media device; associating media data with the virtual media device; and sending, by the switch, via the fabric, to one or more compute nodes of the composed system, the media data.

Abstract: An apparatus for secure multiple server access to a non-volatile storage device is disclosed. A method and storage device product also perform the functions of the apparatus. An apparatus includes a storage device with three or more ports. Each port includes at least one lane and each port is configured to connect to a different server over the at least one lane of the port. The storage device includes a storage controller in the storage device for each port. Each storage controller controls storage to non-volatile storage of the storage device. The storage device includes a logical namespace assigned to each port. Each logical namespace is assigned to a portion of the non-volatile storage of the storage device. The logical namespace of a first port of the three or more ports is inaccessible to a second port of the three or more ports.

Abstract: A network communications component may be configured to self-lock at a signaled transmission rate. The network communications component may receive a first transmission rate signal indicating a first transmission rate. It may be determined that a transmission rate for the network communications component is unset on the network communications component. Determining that the transmission rate for the network communications component is unset may include accessing an entry for the transmission rate in a vital product data stored on the network communications component. The transmission rate for the network communications component may be set by storing an indication of the received first transmission rate in a memory location on the network communications component. Data transmission by the network communications component may be limited, in accordance with the stored indication of the first transmission rate, to not exceed the set transmission rate.

Abstract: Configuring NVMe devices for redundancy and scaling includes: identifying, by a first SSD (‘Solid State Drive’) driver executing on a first CPU (‘Central Processing Unit’), address space of a first SSD coupled to the first CPU by a first PCI (‘Peripheral Component Interconnect’) switch, the first PCI switch including one or more non-transparent bridges (‘NTBs’); partitioning, by the first SSD driver, the address space of the first SSD amongst the NTBs of the first PCI switch and the first CPU, where each NTB is configured to translate CPU memory addresses received from a CPU into a drive address in the address space partitioned to the NTB; and partitioning, by the first SSD driver, a plurality of namespaces of the first SSD amongst the first CPU and the NTBs.

Abstract: Topology discovery between compute nodes and interconnect switches including creating, on an interconnect switch, a virtual topology discovery device for a first port, wherein the interconnect switch is coupled to a compute node via the first port, and wherein the virtual topology discovery device comprises a port identifier for the first port; mapping the virtual topology discovery device to the first port; receiving an inventory request from the compute node via the first port; routing the inventory request to the virtual topology discovery device for the first port; and sending, from the virtual topology discovery device for the first port, the port identifier to the compute node.

Abstract: An apparatus includes a memory device for storing program instructions and a processor for processing the program instructions to: receive a host data storage command that includes a host namespace, a host memory pointer and a logical block address range; translate the host data storage command into a plurality of disk data storage commands, wherein each disk data storage command is uniquely identified with a disk namespace on one of a plurality of non-volatile memory devices; and send, for each of the plurality of disk data storage commands, the disk data storage command to the non-volatile memory device that includes the uniquely identified disk namespace.

Abstract: Configuring NVMe devices for redundancy and scaling includes: identifying, by a first SSD (‘Solid State Drive’) driver executing on a first CPU (‘Central Processing Unit’), address space of a first SSD coupled to the first CPU by a first PCI (‘Peripheral Component Interconnect’) switch, the first PCI switch including one or more non-transparent bridges (‘NTBs’); partitioning, by the first SSD driver, the address space of the first SSD amongst the NTBs of the first PCI switch and the first CPU, where each NTB is configured to translate CPU memory addresses received from a CPU into a drive address in the address space partitioned to the NTB; and partitioning, by the first SSD driver, a plurality of namespaces of the first SSD amongst the first CPU and the NTBs.

Abstract: A method includes a data storage device having a device parameter, said data storage device identifying a firmware image that is associated with said device parameter and is a more current version than a firmware image installed on the data storage device, wherein the identified firmware image is available from a firmware repository. The method further includes the data storage device initiating a download of the identified firmware image from the firmware repository during a period of time that the data storage device is handling no input-output tasks. Optionally, the method may further include the data storage device pausing the download of the firmware image from the firmware repository in response to receiving an input-output task.

Abstract: Self-locking a network communications component transmission rate including receiving, by the network communications component, a first transmission rate signal indicating a first transmission rate; determining that a transmission rate for the network communications component is unset; setting the transmission rate for the network communications component by storing an indication of the first transmission rate in a memory location on the network communications component; and limiting, based on the stored indication of the first transmission rate, data transmission on the network communications component to the first transmission rate.

Abstract: Settings are provided by a chassis management controller to an expansion card in a multi-slot server chassis. The chassis management controller in a multi-slot server chassis provides an operating parameter to a server management controller in a server, and the server management controller writes the operating parameter to a port expander of an expansion card installed on the server. The operating parameter is written to the port expander prior to expansion card power up, and the expansion card uses the operating parameter after power up to derive one or more SERDES value. The SERDES value is used to program an ASIC chip comprising a SERDES converter on the expansion card. In one example, the operating parameter is determined by the capabilities of a chassis midplane at the slot where the compute node is installed.

Abstract: Managing stability of a link coupling an adapter of a computing system to a port of a networking device for in-band data communications, the adapter and the network device coupled for out-of-band data communications to a management module, where link stability is managed by: monitoring link health including retrieving adapter link statistics from the adapter and networking device link statistics from the networking device; determining, in dependence upon the adapter and networking device link statistics, whether the link health meets predefined health acceptability criteria; and if the link health does not meet predefined health acceptability criteria, instructing the adapter to execute one or more predefined corrective actions.

Abstract: Configuring expansion component interconnect (‘ECI’) physical functions on an ECI device in a computing system, including: configuring by an ECI device configuration manager, during run-time of the computing system, vital product data to include an ECI physical function configuration, wherein the ECI physical function configuration comprises data describing a type of ECI physical function; retrieving by an ECI device configuration manager, upon a subsequent startup of the computing system, the ECI physical function configuration from the vital product data; and configuring, by an ECI device configuration manager, a physical function of the ECI device to carry out the type of ECI physical function described in the ECI physical function configuration.

Abstract: A system and method are directed towards a pseudo multi-master operation on a serial bus. The pseudo multi-master operation allows multiple devices without standard multi-master functionality to operate on the serial bus as masters. In a disclosed example, the serial bus is an Inter-Integrated Circuit (I2C) bus, which is isolated when an adapter card requires access to the I2C bus, such as to update vital product data (VPD) to a memory device, and to cache the updated VPD to a chassis management module.

Abstract: Configuring expansion component interconnect (‘ECI’) physical functions on an ECI device in a computing system, including: configuring by an ECI device configuration manager, during run-time of the computing system, vital product data to include an ECI physical function configuration, wherein the ECI physical function configuration comprises data describing a type of ECI physical function; retrieving by an ECI device configuration manager, upon a subsequent startup of the computing system, the ECI physical function configuration from the vital product data; and configuring, by an ECI device configuration manager, a physical function of the ECI device to carry out the type of ECI physical function described in the ECI physical function configuration.

Abstract: Managing stability of a link coupling an adapter of a computing system to a port of a networking device for in-band data communications, the adapter and the network device coupled for out-of-band data communications to a management module, where link stability is managed by: monitoring link health including retrieving adapter link statistics from the adapter and networking device link statistics from the networking device; determining, in dependence upon the adapter and networking device link statistics, whether the link health meets predefined health acceptability criteria; and if the link health does not meet predefined health acceptability criteria, instructing the adapter to execute one or more predefined corrective actions.

Abstract: A system and method are directed towards a pseudo multi-master operation on a serial bus. The pseudo multi-master operation allows multiple devices without standard multi-master functionality to operate on the serial bus as masters. In a disclosed example, the serial bus is an Inter-Integrated Circuit (I2C) bus, which is isolated when an adapter card requires access to the I2C bus, such as to update vital product data (VPD) to a memory device, and to cache the updated VPD to a chassis management module.