Patents by Inventor Patrick L. Gibbons

Patrick L. Gibbons has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10740468
    Abstract: An example computing system in accordance with an aspect of the present disclosure includes a first controller and a second controller. The first controller is to verify integrity of a first root of trust (ROT), and generate an integrity signal indicating the results. The second controller is to verify integrity of a second ROT, write the firmware image to the first controller, and verify integrity of the written firmware image.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: August 11, 2020
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Suhas Shivanna, Patrick L Gibbons, Shiva R Dasari, Luis E Luciani, Jr., Kevin G Depew
  • Patent number: 10585676
    Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: March 10, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey Kevin Jeansonne, Valiuddin Ali, Lan Wang, Baraneedharan Anbazhagan, Patrick L. Gibbons
  • Patent number: 10360148
    Abstract: A second physical-address-dependent code is generated from a first physical-address-dependent code using differential data, where the generating comprises converting a first physical address in a region of the first physical-address-dependent code to a second, different physical address for inclusion in a corresponding region of the second physical-address-dependent code.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: July 23, 2019
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Baraneedharan Anbazhagan, Patrick L. Gibbons, Christopher H Stewart
  • Publication number: 20190102207
    Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.
    Type: Application
    Filed: November 16, 2018
    Publication date: April 4, 2019
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Jeffrey Kevin Jeansonne, Valiuddin Ali, Lan Wang, Baraneedharan Anbazhagan, Patrick L. Gibbons
  • Patent number: 10169052
    Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: January 1, 2019
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey Kevin Jeansonne, Valiuddin Ali, Lan Wang, Baraneedharan Anbazhagan, Patrick L Gibbons
  • Publication number: 20180096154
    Abstract: An example computing system in accordance with an aspect of the present disclosure includes a first controller and a second controller. The first controller is to verify integrity of a first root of trust (ROT), and generate an integrity signal indicating the results. The second controller is to verify integrity of a second ROT, write the firmware image to the first controller, and verify integrity of the written firmware image.
    Type: Application
    Filed: September 25, 2017
    Publication date: April 5, 2018
    Inventors: Suhas SHIVANNA, Patrick L GIBBONS, Shiva R DASARI, Luis E LUCIANI, JR., Kevin G DEPEW
  • Publication number: 20170185429
    Abstract: Examples herein disclose receiving a basic input output system (BIOS) policy change and authorizing the BIOS policy change. Upon the authorization of the BIOS policy change, a first copy of the BIOS policy is stored in a first memory accessible by a central processing unit. Additionally, a second copy of the BIOS policy change is transmitted for storage in a second memory electrically isolated from the central processing unit.
    Type: Application
    Filed: July 22, 2014
    Publication date: June 29, 2017
    Inventors: JEFFREY JEANSONNE, VALIUDDIN ALI, LAN WANG, BARANEEDHARAN ANBAZHAGAN, PATRICK L GIBBONS
  • Publication number: 20160140038
    Abstract: A second physical-address-dependent code is generated from a first physical-address-dependent code using differential data, where the generating comprises converting a first physical address in a region of the first physical-address-dependent code to a second, different physical address for inclusion in a corresponding region of the second physical-address-dependent code.
    Type: Application
    Filed: July 31, 2013
    Publication date: May 19, 2016
    Inventors: BARANEEDHARAN ANBAZHAGAN, PATRICK L. GIBBONS, CHRISTOPHER H STEWART
  • Patent number: 8112637
    Abstract: There is provided a system and method for programming a data storage device with a password. Specifically, there is provided a method comprising initiating a password programming routine for a data storage device, and programming the data storage device with the password associated with an external storage medium, wherein the data storage device is configured to condition access to the data stored on the data storage device based on the password.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: February 7, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jason Spottswood, Mark A. Piwonka, Patrick L. Gibbons, Scott B. Marcak
  • Patent number: 7681023
    Abstract: A method according to the invention ensures optimal memory configuration in a computer: A determination is made whether performance can be improved by rearranging the DIMMs that are installed in the computer. If so, then a user of the computer is notified that the DIMMs can be rearranged to improve performance.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: March 16, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Robert J. Volentine, Mark A. Piwonka, Patrick L. Gibbons
  • Patent number: 7395434
    Abstract: A computer includes a processor, an input device and a read only memory (“ROM”). One or more passwords are flashed in the ROM in encoded form. The encoding process may include any well-known encryption or hash process. The password may include a power-on password usable to change the operating state of the computer and/or an administrator password. Such configuration data preferably also is stored on the ROM in encoded form. The encoded nature of the passwords makes it difficult for an unauthorized entity to gain access to the usable form of the passwords. Further, by storing the passwords and configuration in ROM, such as the computer's main system ROM, it is possible to control write access to the ROM because a computer's ROM can generally only be flashed using SMI code which operates outside the control of the computer's operating system and requires entry of a correct password.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: July 1, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Mark A. Piwonka, Mark W. Shutt, Kevin K. Wong, Patrick L. Gibbons
  • Publication number: 20030208696
    Abstract: A computer includes a processor, an input device and a read only memory (“ROM”). One or more passwords are flashed in the ROM in encoded form. The encoding process may include any well-known encryption or hash process. The password may include a power-on password usable to change the operating state of the computer and/or an administrator password. Such configuration data preferably also is stored on the ROM in encoded form. The encoded nature of the passwords makes it difficult for an unauthorized entity to gain access to the usable form of the passwords. Further, by storing the passwords and configuration in ROM, such as the computer's main system ROM, it is possible to control write access to the ROM because a computer's ROM can generally only be flashed using SMI code which operates outside the control of the computer's operating system and requires entry of a correct password.
    Type: Application
    Filed: May 1, 2002
    Publication date: November 6, 2003
    Applicant: Compaq Information Technologies Group, L.P.
    Inventors: Mark A. Piwonka, Mark W. Shutt, Kevin K. Wong, Patrick L. Gibbons
  • Patent number: 6467038
    Abstract: A computer system that includes a system ROM with at least two sets of character strings, one set in English and at least one other set in a non-English language. Generally, each set of character strings includes characters, words and phrases that are translations of corresponding character strings in the other sets. In a preferred embodiment, the system ROM includes only two sets of character strings—one English and the other non-English. The non-English set of character strings is included as part of a “language module” stored or flashed into the system ROM. The character strings preferably are used to provide information and instructions to a user during system setup. When setup is run, the computer system determines whether a valid international language module is included in the system ROM. If a valid language module is included, the user is prompted to select either English or whatever international language is provided in the language module.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: October 15, 2002
    Assignee: Compaq Information Technologies Group, L.P.
    Inventors: Mark A. Piwonka, Paul J. Broyles, III, Patrick L. Gibbons
  • Patent number: 6243809
    Abstract: A computer system provides for flashing a non-volatile memory image to a non-volatile memory and reading data from a non-volatile memory independently of an operating system. An image buffer is allocated in a volatile memory of the computer system. If flashing a non-volatile memory image to the non-volatile memory is desired, the image buffer is loaded with a portion of the non-volatile memory image. BIOS interface code is then called to place an SMI event code into a memory and to generate a system management interrupt causing the computer system to enter a system management mode. SMI handler code examines the SMI event code and calls SMI service code. Next, the image buffer is located and the portion of the non-volatile memory in the image buffer is flashed to the non-volatile memory by the SMI service code. Locating the image buffer may include locating an image header defined within the volatile memory. The image header may include a password for providing access to the non-volatile memory.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: June 5, 2001
    Assignee: Compaq Computer Corporation
    Inventors: Patrick L. Gibbons, Paul J. Broyles, III