Patents by Inventor Patrick Le Maitre

Patrick Le Maitre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190339551
    Abstract: A device, includes: a ring waveguide; a diode comprising a junction extending at least partly in the ring waveguide; and a first circuit configured to supply a signal representative of a leakage current in the diode.
    Type: Application
    Filed: May 2, 2019
    Publication date: November 7, 2019
    Inventors: Patrick Le Maitre, Nicolas Michit, Jean-Francois Carpentier, Benoit Charbonnier
  • Patent number: 10401571
    Abstract: The disclosure relates to an optical splitter including two waveguides on either side of an axis. Each waveguide includes a first segment and a second segment that are closer to the axis than the rest of the waveguide. The first segments are optically coupled and the second segments are optically coupled. Each guide includes between the first and second segment, starting from the first segment, a first curved section including in succession a curvature the concavity of which is turned the side opposite the axis then a curvature the concavity of which is turned towards the axis, and starting from the second segment a second curved section including in succession a curvature the concavity of which is turned the side opposite the axis then a curvature the concavity of which is turned towards the axis. The first curved sections of the two waveguides are curved differently.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: September 3, 2019
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Patrick Le Maitre, Jean-Francois Carpentier
  • Patent number: 10393965
    Abstract: A photonic interconnection elementary switch is integrated in an optoelectronic chip/The switch includes first and second linear optical waveguides which intersect to form a first intersection. Two first photonic redirect ring resonators are respectively coupled to the first and second optical waveguides. Two second photonic redirect ring resonators are respectively coupled to the first and second optical waveguides. A third linear optical waveguide is coupled to one of the first ring resonators and one of the second ring resonators. A fourth linear optical waveguide is coupled to another of the first resonators and to another of the second ring resonators. A base switch, complex switch, and photonic interconnection network integrated in an optoelectronic chip, include at least two of the photonic interconnection elementary switches.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: August 27, 2019
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Nicolas Michit, Patrick Le Maitre
  • Publication number: 20190250213
    Abstract: An optoelectronic chip includes optical inputs having different passbands, a photonic circuit to be tested, and an optical coupling device configured to couple said inputs to the photonic circuit to be tested.
    Type: Application
    Filed: January 16, 2019
    Publication date: August 15, 2019
    Inventors: Patrick Le Maitre, Jean-Francois Carpentier
  • Publication number: 20190250212
    Abstract: The invention concerns an optoelectronic chip including a pair of optical inputs having a same bandwidth, and each being adapted to a different polarization, at least one photonic circuit to be tested, and an optical coupling device configured to couple the two inputs to the circuit to be tested.
    Type: Application
    Filed: January 16, 2019
    Publication date: August 15, 2019
    Inventors: Patrick Le Maitre, Jean-Francois Carpentier
  • Patent number: 10330865
    Abstract: A method of arranging a network of optical fiber ends opposite a corresponding network of waveguide ends of a semiconductor wafer displaceable with respect to each other in orthogonal directions X and Y, the method including: arranging the fibers so that the network ends have the same orientation and that the projection of the axis of each fiber on the wafer is parallel to direction Y; injecting, into one of the fibers, a light beam having a wavelength such that light is scattered from the fiber walls, locating the fiber axis, and displacing the fibers or the wafer in direction X to align a characteristic point in line with the projection of the fiber axis on the wafer.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: June 25, 2019
    Assignee: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Philippe Grosse, Jean-François Carpentier, Patrick Le Maitre
  • Publication number: 20190162906
    Abstract: An elementary photonic interconnect switch is integrated into an optoelectronic chip and includes four simple photonic interconnect switches. Each simple photonic interconnect switch has two optical waveguides that cross and are linked by a ring resonator having one ring. A basic photonic interconnect switch, a complex photonic interconnect switch and/or a photonic interconnect network are integrated into an optoelectronic chip and including at least two elementary photonic interconnect switches.
    Type: Application
    Filed: November 26, 2018
    Publication date: May 30, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Nicolas MICHIT, Patrick LE MAITRE
  • Patent number: 10274395
    Abstract: A semiconductor device may include a semiconductor wafer, and a reference circuit carried by the semiconductor wafer. The reference circuit may include optical DUTs, a first set of photodetectors coupled to outputs of the optical DUTs, an optical splitter coupled to inputs of the optical DUTs, and a second set of photodetectors coupled to the optical splitter. The optical splitter is to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the optical DUTs and the second set of photodetectors.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: April 30, 2019
    Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Jean-Francois Carpentier, Patrick Le Maitre, Jean-Robert Manouvrier, Charles Baudot, Bertrand Borot
  • Publication number: 20190113415
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe GROSSE, Patrick LE MAITRE, Jean-Francois CARPENTIER
  • Publication number: 20190101699
    Abstract: A photonic interconnection elementary switch is integrated in an optoelectronic chip/The switch includes first and second linear optical waveguides which intersect to form a first intersection. Two first photonic redirect ring resonators are respectively coupled to the first and second optical waveguides. Two second photonic redirect ring resonators are respectively coupled to the first and second optical waveguides. A third linear optical waveguide is coupled to one of the first ring resonators and one of the second ring resonators. A fourth linear optical waveguide is coupled to another of the first resonators and to another of the second ring resonators. A base switch, complex switch, and photonic interconnection network integrated in an optoelectronic chip, include at least two of the photonic interconnection elementary switches.
    Type: Application
    Filed: October 1, 2018
    Publication date: April 4, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Nicolas MICHIT, Patrick LE MAITRE
  • Publication number: 20190094107
    Abstract: An intermediate signal is separated into a first sub-signal and a second sub-signal according to a separation coefficient having a known real value. The first sub-signal is delivered to a first photonic circuit containing at least one photonic device to be characterized and a first photonic part. The second sub-signal is delivered to a second photonic circuit containing a second photonic part having a same transfer function as the first photonic part but lacking the at least one photonic device. Optical output signals from the first and second photonic circuits are converted into first and second electrical signals. Losses of the at least one photonic device are determined from processing the electrical signals and from the known real value of the separation coefficient.
    Type: Application
    Filed: November 13, 2018
    Publication date: March 28, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Patrick Le Maitre, Jean-Francois Carpentier
  • Publication number: 20190079247
    Abstract: A photonic interconnect switch is formed by first and second linear optical waveguides that cross to form an intersection. First and second redirecting photonic ring resonators are coupled together in an intermediate optical coupling zone and are controllable with an electrical signal. The first ring resonator is coupled to the first optical waveguide in a first optical coupling zone. The second ring resonator is coupled to the second optical waveguide in a second optical coupling zone.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 14, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Nicolas MICHIT, Patrick LE MAITRE
  • Patent number: 10180373
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: January 15, 2019
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Grosse, Patrick Le Maitre, Jean-Francois Carpentier
  • Patent number: 10161830
    Abstract: An intermediate signal is separated into a first sub-signal and a second sub-signal according to a separation coefficient having a known real value. The first sub-signal is delivered to a first photonic circuit containing at least one photonic device to be characterized and a first photonic part. The second sub-signal is delivered to a second photonic circuit containing a second photonic part having a same transfer function as the first photonic part but lacking the at least one photonic device. Optical output signals from the first and second photonic circuits are converted into first and second electrical signals. Losses of the at least one photonic device are determined from processing the electrical signals and from the known real value of the separation coefficient.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: December 25, 2018
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Patrick Le Maitre, Jean-Francois Carpentier
  • Publication number: 20180341061
    Abstract: A power balancing device includes first, second, and third power splitting devices on a semiconductor substrate. The first power splitting device includes an input, a first output, and a second output. A ratio of the power outputs at the first and second outputs is a first ratio. The second power splitting device includes third and fourth outputs and an input coupled to the first output. A ratio of the power outputs at the third and fourth outputs is a second ratio. The third power splitting device includes a fifth and sixth output and an input coupled to the second output. A ratio of the power outputs at the fifth and sixth outputs is a third ratio. The first, second, and third ratios are substantially similar. The input of the first power splitting device and the third and sixth outputs make the input and outputs respectively of the power balancing device.
    Type: Application
    Filed: May 26, 2017
    Publication date: November 29, 2018
    Inventors: Jean-Francois Carpentier, Patrick Le Maitre
  • Publication number: 20180329144
    Abstract: The disclosure relates to an optical splitter including two waveguides on either side of an axis. Each waveguide includes a first segment and a second segment that are closer to the axis than the rest of the waveguide. The first segments are optically coupled and the second segments are optically coupled. Each guide includes between the first and second segment, starting from the first segment, a first curved section including in succession a curvature the concavity of which is turned the side opposite the axis then a curvature the concavity of which is turned towards the axis, and starting from the second segment a second curved section including in succession a curvature the concavity of which is turned the side opposite the axis then a curvature the concavity of which is turned towards the axis. The first curved sections of the two waveguides are curved differently.
    Type: Application
    Filed: May 4, 2018
    Publication date: November 15, 2018
    Inventors: Patrick Le Maitre, Jean-Francois Carpentier
  • Publication number: 20180267244
    Abstract: A method of arranging a network of optical fiber ends opposite a corresponding network of waveguide ends of a semiconductor wafer displaceable with respect to each other in orthogonal directions X and Y, the method including: arranging the fibers so that the network ends have the same orientation and that the projection of the axis of each fiber on the wafer is parallel to direction Y; injecting, into one of the fibers, a light beam having a wavelength such that light is scattered from the fiber walls, locating the fiber axis, and displacing the fibers or the wafer in direction X to align a characteristic point in line with the projection of the fiber axis on the wafer.
    Type: Application
    Filed: March 19, 2018
    Publication date: September 20, 2018
    Inventors: Philippe GROSSE, Jean-François CARPENTIER, Patrick LE MAITRE
  • Publication number: 20180031443
    Abstract: An intermediate signal is separated into a first sub-signal and a second sub-signal according to a separation coefficient having a known real value. The first sub-signal is delivered to a first photonic circuit containing at least one photonic device to be characterized and a first photonic part. The second sub-signal is delivered to a second photonic circuit containing a second photonic part having a same transfer function as the first photonic part but lacking the at least one photonic device. Optical output signals from the first and second photonic circuits are converted into first and second electrical signals. Losses of the at least one photonic device are determined from processing the electrical signals and from the known real value of the separation coefficient.
    Type: Application
    Filed: March 16, 2017
    Publication date: February 1, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Patrick Le Maitre, Jean-Francois Carpentier
  • Publication number: 20170363507
    Abstract: A semiconductor device may include a semiconductor wafer, and a reference circuit carried by the semiconductor wafer. The reference circuit may include optical DUTs, a first set of photodetectors coupled to outputs of the optical DUTs, an optical splitter coupled to inputs of the optical DUTs, and a second set of photodetectors coupled to the optical splitter. The optical splitter is to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the optical DUTs and the second set of photodetectors.
    Type: Application
    Filed: September 1, 2017
    Publication date: December 21, 2017
    Inventors: Jean-Francois Carpentier, Patrick Le Maitre, Jean-Robert Manouvrier, Charles Baudot, Bertrand Borot
  • Publication number: 20170307687
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Application
    Filed: April 17, 2017
    Publication date: October 26, 2017
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Grosse, Patrick Le Maitre, Jean-Francois Carpentier