Patents by Inventor Patrick M. West
Patrick M. West has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11969578Abstract: Methods, devices and systems are disclosed for inter-app communications between software applications on a mobile communications device. In one aspect, a computer-readable medium on a mobile computing device comprising an inter-application communication data structure to facilitate transitioning and distributing data between software applications in a shared app group for an operating system of the mobile computing device includes a scheme field of the data structure providing a scheme id associated with a target software app to transition to from a source software app, wherein the scheme id is listed on a scheme list stored with the source software app; and a payload field of the data structure providing data and/or an identification where to access data in a shared file system accessible to the software applications in the shared app group, wherein the payload field is encrypted.Type: GrantFiled: March 16, 2021Date of Patent: April 30, 2024Assignee: Dexcom, Inc.Inventors: Gary A. Morris, Scott M. Belliveau, Esteban Cabrera, Jr., Rian Draeger, Laura J. Dunn, Timothy Joseph Goldsmith, Hari Hampapuram, Christopher Robert Hannemann, Apurv Ullas Kamath, Katherine Yerre Koehler, Patrick Wile McBride, Michael Robert Mensinger, Francis William Pascual, Philip Mansiel Pellouchoud, Nicholas Polytaridis, Philip Thomas Pupa, Anna Leigh Davis, Kevin Shoemaker, Brian Christopher Smith, Benjamin Elrod West, Atiim Joseph Wiley
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Publication number: 20240091442Abstract: Methods, devices and systems are disclosed for inter-app communications between software applications on a mobile communications device. In one aspect, a computer-readable medium on a mobile computing device comprising an inter-application communication data structure to facilitate transitioning and distributing data between software applications in a shared app group for an operating system of the mobile computing device includes a scheme field of the data structure providing a scheme id associated with a target software app to transition to from a source software app, wherein the scheme id is listed on a scheme list stored with the source software app; and a payload field of the data structure providing data and/or an identification where to access data in a shared file system accessible to the software applications in the shared app group, wherein the payload field is encrypted.Type: ApplicationFiled: September 27, 2023Publication date: March 21, 2024Inventors: Gary A. MORRIS, Scott M. BELLIVEAU, Esteban CABRERA, JR., Anna Leigh DAVIS, Rian W. DRAEGER, Laura J. DUNN, Timothy Joseph GOLDSMITH, Hari HAMPAPURAM, Christopher Robert HANNEMANN, Apurv Ullas KAMATH, Katherine Yerre KOEHLER, Patrick Wile MCBRIDE, Michael Robert MENSINGER, Francis William PASCUAL, Philip Mansiel PELLOUCHOUD, Nicholas POLYTARIDIS, Philip Thomas PUPA, Kevin SHOEMAKER, Brian Christopher SMITH, Benjamin Elrod WEST, Atiim Joseph WILEY
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Publication number: 20210263829Abstract: A central processing unit measurement facility is virtualized in order to support concurrent use of the facility by multiple guests executing within a virtual environment. Each guest of the environment has independent control over disablement/enablement of the facility for that guest.Type: ApplicationFiled: May 7, 2021Publication date: August 26, 2021Inventors: Lisa Cranton Heller, Patrick M. West, JR., Phil C. Yeh
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Patent number: 11036611Abstract: A central processing unit measurement facility is virtualized in order to support concurrent use of the facility by multiple guests executing within a virtual environment. Each guest of the environment has independent control over disablement/enablement of the facility for that guest.Type: GrantFiled: August 4, 2016Date of Patent: June 15, 2021Assignee: International Business Machines CorporationInventors: Lisa Cranton Heller, Patrick M. West, Jr., Phil C. Yeh
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Patent number: 10620877Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.Type: GrantFiled: July 3, 2019Date of Patent: April 14, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jane H. Bartik, Lisa C. Heller, Damian L. Osisek, Donald W. Schmidt, Patrick M. West, Jr., Phil C. Yeh
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Publication number: 20190324682Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.Type: ApplicationFiled: July 3, 2019Publication date: October 24, 2019Inventors: Jane H. Bartik, Lisa C. Heller, Damian L. Osisek, Donald W. Schmidt, Patrick M. West, JR., Phil C. Yeh
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Patent number: 10394488Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.Type: GrantFiled: December 8, 2017Date of Patent: August 27, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jane H. Bartik, Lisa C. Heller, Damian L. Osisek, Donald W. Schmidt, Patrick M. West, Jr., Phil C. Yeh
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Publication number: 20180101326Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.Type: ApplicationFiled: December 8, 2017Publication date: April 12, 2018Inventors: Jane H. Bartik, Lisa C. Heller, Damian L. Osisek, Donald W. Schmidt, Patrick M. West, Jr., Phil C. Yeh
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Patent number: 9928032Abstract: Embodiments relate to a hardware circuit that is operable as a fixed point adder and a checksum adder. An aspect includes a driving of a multifunction compression tree disposed on a circuit path based on a control bit to execute one of first and second schemes of vector input addition and a driving of a multifunction adder disposed on the circuit path based on the control bit to perform the one of the first and second schemes of vector input addition.Type: GrantFiled: September 7, 2017Date of Patent: March 27, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James R. Cuffney, John G. Rell, Jr., Eric M. Schwarz, Patrick M. West, Jr.
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Patent number: 9880785Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.Type: GrantFiled: April 24, 2017Date of Patent: January 30, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jane H. Bartik, Lisa C. Heller, Damian L. Osisek, Donald W. Schmidt, Patrick M. West, Jr., Phil C. Yeh
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Publication number: 20170364328Abstract: Embodiments relate to a hardware circuit that is operable as a fixed point adder and a checksum adder. An aspect includes a driving of a multifunction compression tree disposed on a circuit path based on a control bit to execute one of first and second schemes of vector input addition and a driving of a multifunction adder disposed on the circuit path based on the control bit to perform the one of the first and second schemes of vector input addition.Type: ApplicationFiled: September 7, 2017Publication date: December 21, 2017Inventors: James R. Cuffney, John G. Rell, JR., Eric M. Schwarz, Patrick M. West, JR.
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Patent number: 9766859Abstract: Embodiments relate to a hardware circuit that is operable as a fixed point adder and a checksum adder. An aspect includes a driving of a multifunction compression tree disposed on a circuit path based on a control bit to execute one of first and second schemes of vector input addition and a driving of a multifunction adder disposed on the circuit path based on the control bit to perform the one of the first and second schemes of vector input addition.Type: GrantFiled: November 7, 2016Date of Patent: September 19, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James R. Cuffney, John G. Rell, Jr., Eric M. Schwarz, Patrick M. West, Jr.
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Publication number: 20170228195Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.Type: ApplicationFiled: April 24, 2017Publication date: August 10, 2017Inventors: Jane H. Bartik, Lisa C. Heller, Damian L. Osisek, Donald W. Schmidt, Patrick M. West, JR., Phil C. Yeh
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Patent number: 9715420Abstract: An apparatus for comparing strings comprises a first and a second set of input registers, a matrix of comparator circuits wherein rows of the matrix correspond to the first set of input registers and columns of the matrix correspond to the second set of input registers, a set of row control registers wherein each register corresponds to a row of the matrix of the comparator circuits, the matrix of comparator circuits configured to compare data provided by the first set of registers with data provided by the second set of registers according to the row control registers, and an error detection circuit configured to compare results from four comparator circuits corresponding to two adjacent rows and two columns of the matrix of comparator circuits. A method that invokes the above mentioned apparatus is also disclosed herein, along with a computer program product corresponding to the method.Type: GrantFiled: January 21, 2015Date of Patent: July 25, 2017Assignee: International Business Machines CorporationInventors: James R. Cuffney, Timothy J. Koprowski, John G. Rell, Jr., Patrick M. West, Jr.
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Patent number: 9652383Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.Type: GrantFiled: October 9, 2015Date of Patent: May 16, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jane H. Bartik, Lisa C. Heller, Damian L. Osisek, Donald W. Schmidt, Patrick M. West, Jr., Phil C. Yeh
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Patent number: 9588838Abstract: An apparatus for comparing strings comprises a first and a second set of input registers, a matrix of comparator circuits wherein rows of the matrix correspond to the first set of input registers and columns of the matrix correspond to the second set of input registers, a set of row control registers wherein each register corresponds to a row of the matrix of the comparator circuits, the matrix of comparator circuits configured to compare data provided by the first set of registers with data provided by the second set of registers according to the row control registers, and an error detection circuit configured to compare results from four comparator circuits corresponding to two adjacent rows and two columns of the matrix of comparator circuits. A method that invokes the above mentioned apparatus is also disclosed herein, along with a computer program product corresponding to the method.Type: GrantFiled: June 2, 2016Date of Patent: March 7, 2017Assignee: International Business Machines CorporationInventors: James R. Cuffney, Timothy J. Koprowski, John G. Rell, Jr., Patrick M. West, Jr.
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Publication number: 20170052763Abstract: Embodiments relate to a hardware circuit that is operable as a fixed point adder and a checksum adder. An aspect includes a driving of a multifunction compression tree disposed on a circuit path based on a control bit to execute one of first and second schemes of vector input addition and a driving of a multifunction adder disposed on the circuit path based on the control bit to perform the one of the first and second schemes of vector input addition.Type: ApplicationFiled: November 7, 2016Publication date: February 23, 2017Inventors: James R. Cuffney, John G. Rell, JR., Eric M. Schwarz, Patrick M. West, JR.
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Patent number: 9535659Abstract: Embodiments relate to a hardware circuit that is operable as a fixed point adder and a checksum adder. An aspect includes a driving of a multifunction compression tree disposed on a circuit path based on a control bit to execute one of first and second schemes of vector input addition and a driving of a multifunction adder disposed on the circuit path based on the control bit to perform the one of the first and second schemes of vector input addition.Type: GrantFiled: March 10, 2016Date of Patent: January 3, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James R. Cuffney, John G. Rell, Jr., Eric M. Schwarz, Patrick M. West, Jr.
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Publication number: 20160342442Abstract: A central processing unit measurement facility is virtualized in order to support concurrent use of the facility by multiple guests executing within a virtual environment. Each guest of the environment has independent control over disablement/enablement of the facility for that guest.Type: ApplicationFiled: August 4, 2016Publication date: November 24, 2016Inventors: Lisa Cranton Heller, Patrick M. West, JR., Phil C. Yeh
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Patent number: 9501262Abstract: Embodiments relate to vectorized Galois field multiplication. An aspect includes an input of first and second input operands of equal sizes into a single hardware tree, a calculation of a predicted parity as a parity of the first input operand ANDed with a parity of the second input operand, a comparison of the predicted parity with a parity generated on a final result of a Galois field multiplication of the first and second operands and a raising of an error based on a mismatch between the predicted parity and the generated parity.Type: GrantFiled: May 30, 2014Date of Patent: November 22, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: James R. Cuffney, John G. Rell, Jr., Eric M. Schwarz, Patrick M. West, Jr.