Patents by Inventor Patrick Merkli

Patrick Merkli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Lock-in amplifier with phase-synchronous processing
    Patent number: 8860505
    Abstract: The presented device is the combination of a lock-in amplifier unit (1) and a phase-synchronous processing unit (2). This combination leads to a multitude of valuable signal analysis and conditioning possibilities. Amongst others, these possibilities include (i) extraction of time-domain properties of the input signal, (ii) extraction of statistical properties of the input signal, (iii) extraction of frequency-domain properties of the input signal, and (iv) preconditioning of the lock-in input signal.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: October 14, 2014
    Assignee: Zurich Instruments AG
    Inventors: Sadik Hafizovic, Flavio Heer, Patrick Merkli
  • LOCK-IN AMPLIFIER WITH PHASE-SYNCHRONOUS PROCESSING
    Publication number: 20140218103
    Abstract: The presented device is the combination of a lock-in amplifier unit (1) and a phase-synchronous processing unit (2). This combination leads to a multitude of valuable signal analysis and conditioning possibilities. Amongst others, these possibilities include (i) extraction of time-domain properties of the input signal, (ii) extraction of statistical properties of the input signal, (iii) extraction of frequency-domain properties of the input signal, and (iv) preconditioning of the lock-in input signal.
    Type: Application
    Filed: February 4, 2013
    Publication date: August 7, 2014
    Inventors: Sadik HAFIZOVIC, Flavio HEER, Patrick MERKLI
  • Multi-level soft detector/quantizer
    Publication number: 20060212504
    Abstract: An analog electronic circuit is proposed that e.g. computes the symbol likelihoods for PAM or QAM signal constellations. The circuit has at least one set of M transistors connected to a common current source. A multiplier/adder generates the voltages to be applied to the transistors from a value y and a set of M expected values in such a way that the currents through the transistors correspond to the likelihood that the value y corresponds to the expected values. The circuit can be used for signal demodulation and various other applications.
    Type: Application
    Filed: March 16, 2005
    Publication date: September 21, 2006
    Inventors: Hans-Andrea Loeliger, Matthias Frey, Patrick Merkli
  • Method and circuit for combined multiplication and division
    Publication number: 20060026224
    Abstract: Previously known analog transistor circuits that compute the “outer product” of two probability mass functions are extended to compute also divisions. Such circuits can be used in hardware implementations of certain algorithms including “generalized belief propagation”, which have applications in many inference problems including the decoding of error correcting codes.
    Type: Application
    Filed: July 30, 2004
    Publication date: February 2, 2006
    Inventor: Patrick Merkli