Patents by Inventor Patrick Michael Overs

Patrick Michael Overs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10467181
    Abstract: An interface comprises routing circuitry configured to receive data items from a data source device and to route the received data items to a data sink device by either a first data path including a data buffer or a second data path, in response to an indication of a current state of a data sink device; the routing circuitry being configured to route the received data item by the first data path and to initiate a transition of the data sink device to a ready state in response to an indication that the data sink device is in a quiescent mode and currently not ready to receive the data item, the routing circuitry being configured to hold the data item at the buffer and to inhibit the data source device from sending further data items until the routing circuitry receives a subsequent indication that the data sink device is ready to receive the data item; and the routing circuitry being configured to route the received data item by the second data path in response to an indication that the data sink device is cur
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: November 5, 2019
    Assignee: ARM Limited
    Inventors: Peter Czakó, Seow Chuan Lim, Dominic William Brown, Christopher Vincent Severino, Patrick Michael Overs
  • Publication number: 20180004704
    Abstract: An interface comprises routing circuitry configured to receive data items from a data source device and to route the received data items to a data sink device by either a first data path including a data buffer or a second data path, in response to an indication of a current state of a data sink device; the routing circuitry being configured to route the received data item by the first data path and to initiate a transition of the data sink device to a ready state in response to an indication that the data sink device is in a quiescent mode and currently not ready to receive the data item, the routing circuitry being configured to hold the data item at the buffer and to inhibit the data source device from sending further data items until the routing circuitry receives a subsequent indication that the data sink device is ready to receive the data item; and the routing circuitry being configured to route the received data item by the second data path in response to an indication that the data sink device is cur
    Type: Application
    Filed: May 24, 2017
    Publication date: January 4, 2018
    Inventors: Peter CZAKÓ, Seow Chuan LIM, Dominic William BROWN, Christopher Vincent SEVERINO, Patrick Michael OVERS
  • Patent number: 7486130
    Abstract: A clock distribution approach includes distributing a clock signal from a clock tree to a first set of circuit elements characterized by a first circuit characteristic; and distributing a clock signal from a sub-tree of the clock tree to a second set of circuit elements characterized by a second circuit characteristic different from the first circuit characteristic.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: February 3, 2009
    Assignee: Ember Corporation
    Inventors: Patrick Michael Overs, Nicholas James Horne, Johann Ziegler