Abstract: The invention relates to compounds of formula (I), particularly for the use thereof as a medicament, especially in the treatment or prevention of neurogenerative disorders. The invention also relates to the methods for producing said compounds, and to the pharmaceutical compositions containing same.

Abstract: The invention relates to compounds of formula (I), particularly for the use thereof as a medicament, especially in the treatment or prevention of neurogenerative disorders. The invention also relates to the methods for producing said compounds, and to the pharmaceutical compositions containing same.

Abstract: The invention relates to a drug combination comprising gaseous xenon and at least one antagonist of the NMDA receptors in a liquid or solid form for treating a disease caused by a dysfunction of the dopaminergic synaptic transmission in a human patient. The antagonist of the NMDA receptors is preferably selected from memantine, nitromemantine, amantadine and ifenprodil. The invention allows the normal function of the dopaminergic synaptic transmission of diseased neurons with an altered function to be reestablished.

Abstract: The invention relates to a drug combination including gaseous xenon and at least one NMDA receptor antagonist in liquid or solid form. In order to treat or slow tumour proliferation of cells in the contral nervous system in a human being, in particular astrocyte glia and/or the percursors thereof. The NMDA receptor antagonist is perferably memantine or altromemantine. The proportion of xenonis 10% to 80% by volume.

Abstract: The invention relates to a drug combination including xenon gas and at least one antioxidant, in liquid or solid form, for use in treating, slowing, or preventing neurological damage following a neurodegenerative disease in a human being. Preferably, the xenon content is 10% to 80% by volume. Also, the antioxidant is preferably vitamin E, a vitamin E analog, or a vitamin E derivative. The neurodegenerative disease is Parkinson's disease or a disease related to Parkinson's disease.

Abstract: The invention relates to a gaseous medication containing xenon, preferably in an amount of less than 75% by volume, for use by inhalation, in combination with at least one NMDA receptor antagonist in the form of a liquid or solid, in particular memantine, for treating, slowing or preventing neurological deterioration consequent upon a neurodegenerative disease, in particular Alzheimer's disease, in a human patient.

Abstract: A method for supplying a mask through which air flows with a regulated degree of humidification (m) is provided. The method may include: providing a water reservoir configured such that the air circulates in contact with the surface of water within the reservoir is charged with humidity; providing a heating device for heating the water in the reservoir by circulating an electric current; measuring an average intensity (Iav) of the current passing through the heating device; and controlling the average intensity (Iav) relative to a reference value (Iavc) to obtain a degree of humidification (m) of the air that is independent of the ambient temperature (Ta). An apparatus for regulating the degree of humidification of air flow, as well as a heating humidifier including such a regulation device, are also provided.

Abstract: A fault display module for a hardware device includes an external power input for providing power to the fault display unit when the associated hardware device is disconnected from its power supply.

Abstract: A method for sharing data contained on a peripheral device amongst a plurality of blade servers is disclosed. The method includes storing a copy of data from a peripheral device to a memory device. The memory device is partitioned into at least ‘n’ memory areas, each memory area storing one copy of the data. The method also includes assigning one of the at least ‘n’ memory areas to each of a plurality ‘n’ of servers. The method also includes establishing communication between the plurality of servers and the plurality of assigned memory areas via a switch controller. The switch controller is configured to access the plurality of assigned memory areas via a processor.

Abstract: A hardware device for concurrently processing a fixed set of predetermined tasks associated with an algorithm which includes a number of processes, some of the processes being dependent on binary decisions, includes a plurality of task units for processing data, making decisions and/or processing data and making decisions, including source task units and destination task units. A task interconnection logic means interconnect the task units for communicating actions from a source task unit to a destination task unit. Each of the task units includes a processor for executing only a particular single task of the fixed set of predetermined tasks associated with the algorithm in response to a received request action, and a status manager for handling the actions from the source task units and building the actions to be sent to the destination task units.

Abstract: A hardware device for concurrently processing a fixed set of predetermined tasks associated with an algorithm which includes a number of processes, some of the processes being dependent on binary decisions, includes a plurality of task units for processing data, making decisions and/or processing data and making decisions, including source task units and destination task units. A task interconnection logic means interconnect the task units for communicating actions from a source task unit to a destination task unit. Each of the task units includes a processor for executing only a particular single task of the fixed set of predetermined tasks associated with the algorithm in response to a received request action, and a status manager for handling the actions from the source task units and building the actions to be sent to the destination task units.

Abstract: A method for sharing data contained on a peripheral device amongst a pluratlity of blade servers is disclosed. The method includes storing a copy of data from a peripheral device to a memory device. The memory device is partitioned into at least ‘n’ memory areas, each memory area storing one copy of the data. The method also includes assigning one of the at least ‘n’ memory areas to each of a plurality ‘n’ of servers. The method also includes establishing communication between the plurality of servers and the plurality of assigned memory areas via a switch controller. The switch controller is configured to access the plurality of assigned memory areas via a processor.

Abstract: A hardware device for concurrently processing a fixed set of predetermined tasks associated with an algorithm which includes a number of processes, some of the processes being dependent on binary decisions, includes a plurality of task units for processing data, making decisions and/or processing data and making decisions, including source task units and destination task units. A task interconnection logic means interconnect the task units for communicating actions from a source task unit to a destination task unit. Each of the task units includes a processor for executing only a particular single task of the fixed set of predetermined tasks associated with the algorithm in response to a received request action, and a status manager for handling the actions from the source task units and building the actions to be sent to the destination task units.

Abstract: A hardware device for processing the tasks of an algorithm of the type having a number of processes the execution of some of which depend on binary decisions has a plurality of task units (10, 12, 14), each of which are associated with a task defined as being either one process or one decision or one process together with a following decision. A task interconnection logic block (16) is connected to each task unit for communicating actions from a source task unit to a destination task unit. Each task unit includes a processor (18) for processing the steps of the associated task when a received action requests such a processing. A status manager (20) handles actions coming from other task units and builds actions to be sent to other task units.

Abstract: A hardware device for concurrently processing a fixed set of predetermined tasks associated with an algorithm which includes a number of processes, some of the processes being dependent on binary decisions, includes a plurality of task units for processing data, making decisions and/or processing data and making decisions, including source task units and destination task units. A task interconnection logic means interconnect the task units for communicating actions from a source task unit to a destination task unit. Each of the task units includes a processor for executing only a particular single task of the fixed set of predetermined tasks associated with the algorithm in response to a received request action, and a status manager for handling the actions from the source task units and building the actions to be sent to the destination task units.

Abstract: A system for sharing data contained on a peripheral device amongst a plurality of blade servers is disclosed. The system includes a memory device for storing the data contained on the peripheral device. The memory device is partitioned into memory areas. Each memory area stores one copy of the data. The system also includes a processor coupled to the memory device for assigning one of the memory areas to each blade server. The system also includes a switch controller coupled to the processor and to the plurality of blade servers for establishing communication between the plurality of blade servers and the plurality of assigned memory areas.

Abstract: A method for validating an electronic payment by a credit/debit card in a transaction system. The method includes registering a purchase of an article by a buyer using a credit/debit card associated with at least one PIN code, checking that the at least one PIN code is associated with the number of said credit/debit card provided by said buyer to said seller terminal, checking, by said electronic payment center, whether or not said at least one PIN code is valid, and one of: after the at least one PIN code is found to be valid, checking, by said electronic payment center, whether the electronic payment center has received a pre-validation from a third party; after the at least one PIN code is found to be valid, contacting a third party via a communication network and requesting that the third party validate the purchase; and after the at least one PIN code is found to be valid, contacting a third party via a communication network and requesting said at least one PIN code from the third party.

Abstract: The disclosed invention relates to a re-synchronization system that operates in a switching arrangement receiving a plurality of incoming data packets. The switching arrangement is made of an active switch card that transmits the incoming data packets and a backup switch card that may be re-activated by an operator after replacement. The re-synchronization system is implemented in each switch card. When the backup switch card is re-activated, both switch cards receive the incoming data packets and the system of the invention allows to re-synchronized both switch cards by controlling the transmission of the incoming data packets out of each switch card until the same data packets are transmitted. The re-synchronization system further comprise storage for storing the incoming data packets and detector for detecting a re-synchronization information among the incoming data packets.

Abstract: Systems and methods for providing a user interface for a breathing assistance system are disclosed. A user interface may include a plurality of user-activated buttons configured to receive user input and a display communicatively coupled to the plurality of buttons. The display may include a plurality of function indicators, each function indicator associated with a corresponding one of the user-activated buttons and configured to display a different graphical function representations in different situations, the different graphical function representations indicating different functions of the corresponding user-activated button.

Abstract: A data packet switching node that temporarily stores data packets received from at least one source network adapter and transmits them to at least one destination network adapter comprises a data packet flow control system to control the data packet flow. The data packet flow control system comprises identifier to determine the at least one destination adapter of each received data packet. Then, flow control logic coupled to the storage allow computing a data packet flow value representing the traffic for the at least one destination adapter. The data packet flow value is transmitted simultaneously to the at least one source network adapter and to the at least one destination network adapter each time a data packet for the at least one destination network adapter is stored into the storage.