Patents by Inventor Patrick Nardi

Patrick Nardi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230307379
    Abstract: Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate, and a die coupled to the package substrate. In an embodiment, the electronic package further comprises a stiffener on the package substrate surrounding the die. In an embodiment, the stiffener is a ring with one or more corner regions and one or more beams. In an embodiment, each beam is between a pair of corner regions, and the one or more corner regions have a first thickness and the one or more beams have a second thickness that is greater than the first thickness.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 28, 2023
    Inventors: Phil GENG, Patrick NARDI, Ravindranath V. MAHAJAN, Dingying David XU, Prasanna RAGHAVAN, John HARPER, Sanjoy SAHA, Yang JIAO
  • Publication number: 20220285288
    Abstract: A stiffener for an integrated circuit (IC) package assembly including an IC die electrically interconnected to a substrate. The stiffener is to be mechanically attached to the substrate adjacent to at least one edge of the IC die and have a coefficient of linear thermal expansion (CTE) exceeding that of the substrate. The stiffener may be an “anti-invar” metallic alloy. Anti-invar alloys display “anti-invar” behavior where thermal expansion of the material is significantly enhanced relative to other compositions of the particular alloy system. A package stiffener may be a high-Mn steel, for example, such as ASTM International A128. In other examples, a package stiffener is a MnCuNi, FeNiMn, or FeNiCr alloy having an average CTE over a range of 25-100° C. of at least 18 ppm, and a room temperature modulus of elasticity of at least 120 GPa.
    Type: Application
    Filed: March 4, 2021
    Publication date: September 8, 2022
    Applicant: Intel Corporation
    Inventors: Valery Ouvarov-Bancalero, John Harper, Malavarayan Sankarasubramanian, Patrick Nardi, Bamidele Daniel Falola, Ravi Siddappa, James Mertens
  • Patent number: 10651108
    Abstract: Devices and methods disclosed herein can include a conductive foam having pores disposed within the conductive foam. The conductive foam can be compressible between an uncompressed thickness and a compressed thickness. The compressed thickness can be ninety-five percent or less of the uncompressed thickness. In one example, a filler can be disposed in the pores of the conductive foam. The filler can include a first thermal conductivity. The first thermal conductivity can be greater than a thermal conductivity of air.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: May 12, 2020
    Assignee: Intel Corporation
    Inventors: Zhizhong Tang, Syadwad Jain, Wei Hu, Michael A. Schroeder, Rajen S. Sidhu, Carl L. Deppisch, Patrick Nardi, Kelly P. Lofgreen, Manish Dubey
  • Patent number: 10535615
    Abstract: An electronic package that includes a substrate and a die attached to the substrate. The electronic package further includes a stiffener that is attached to the substrate adjacent to the die. The stiffener is formed of a first layer made from one material and a second layer made from a different material.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: January 14, 2020
    Assignee: Intel Corporation
    Inventors: Manish Dubey, Srikant Nekkanty, Rajendra C. Dias, Patrick Nardi
  • Patent number: 10290569
    Abstract: An apparatus, comprising a first platform comprising a first working surface having a first non-planar portion; and a second platform comprising a second working surface having a second non-planar portion, wherein: the second working surface is opposite the first working surface, a distance between the first working surface and the second working surface is adjustable, the first non-planar portion comprises a first curved portion, and the second non-planar portion comprises a second curved portion opposite the first curved portion.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: May 14, 2019
    Assignee: Intel Corporation
    Inventors: Kyle Yazzie, Venkata Suresh R. Guthikonda, Patrick Nardi, Santosh Sankarasubramanian, Kevin Y. Lin, Leigh M. Tribolet, John L. Harper, Pramod Malatkar
  • Publication number: 20190103345
    Abstract: An apparatus, comprising a first platform comprising a first working surface having a first non-planar portion; and a second platform comprising a second working surface having a second non-planar portion, wherein: the second working surface is opposite the first working surface, a distance between the first working surface and the second working surface is adjustable, the first non-planar portion comprises a first curved portion, and the second non-planar portion comprises a second curved portion opposite the first curved portion.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Inventors: Kyle YAZZIE, Venkata Suresh R. GUTHIKONDA, Patrick NARDI, Santosh SANKARASUBRAMANIAN, Kevin Y. LIN, Leigh M. TRIBOLET, John L. HARPER, Pramod MALATKAR
  • Patent number: 9887104
    Abstract: Some embodiments relate to an electronic package. The electronic package includes a substrate and a die attached to the substrate. The electronic package further includes an underfill positioned between the die and the substrate due to capillary action. A support surrounds the die. The support provides the same beneficial fillet geometry on all die edges. Therefore, the support provides similar stress reduction on all die edges. Other embodiments relate to method of fabricating an electronic package. The method includes attaching a die to a substrate and inserting an underfill between the die and the substrate using capillary action. The method further includes placing a support around the die such that the support surrounds the die.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: February 6, 2018
    Assignee: Intel Corporation
    Inventors: Manish Dubey, Rajendra C. Dias, Patrick Nardi, David Woodhams
  • Publication number: 20180033741
    Abstract: An electronic package that includes a substrate and a die attached to the substrate. The electronic package further includes a stiffener that is attached to the substrate adjacent to the die. The stiffener is formed of a first layer made from one material and a second layer made from a different material.
    Type: Application
    Filed: February 12, 2016
    Publication date: February 1, 2018
    Inventors: Manish Dubey, Srikant Nekkanty, Rajendra C. Dias, Patrick Nardi
  • Publication number: 20180005917
    Abstract: Devices and methods disclosed herein can include a conductive foam having pores disposed within the conductive foam. The conductive foam can be compressible between an uncompressed thickness and a compressed thickness. The compressed thickness can be ninety-five percent or less of the uncompressed thickness. In one example, a filler can be disposed in the pores of the conductive foam. The filler can include a first thermal conductivity. The first thermal conductivity can be greater than a thermal conductivity of air.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 4, 2018
    Inventors: Zhizhong Tang, Syadwad Jain, Wei Hu, Michael A. Schroeder, Rajen S. Sidhu, Carl L. Deppisch, Patrick Nardi, Kelly P. Lofgreen
  • Patent number: 9832860
    Abstract: Techniques are disclosed for forming a package substrate with integrated stiffener. A panel of package substrates are provided. An adhesion layer is then formed on each package substrate of the panel of package substrates. A panel of stiffeners are then attached to the panel of package substrates by the adhesion layer, each stiffener corresponding to a respective package substrate. The panel of package substrates is then singulated into individual package substrates with integrated stiffeners. The stiffeners on the singulated package substrates include tabs that extend to the edges of the package substrates.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: November 28, 2017
    Assignee: Intel Corporation
    Inventors: Robert Starkston, John Guzek, Patrick Nardi, Keith Jones, Javier Soto Gonzalez
  • Publication number: 20170186667
    Abstract: Embodiments are generally directed to cooling of electronics using folded foil microchannels. An embodiment of an apparatus includes a semiconductor die; a substrate, the semiconductor die being coupled with the substrate; and a cooling apparatus for the semiconductor die, wherein the cooling apparatus includes a folded foil preform, the folded foil forming a plurality of microchannels, and a fluid coolant system to direct a fluid coolant through the microchannels of the folded foil.
    Type: Application
    Filed: December 26, 2015
    Publication date: June 29, 2017
    Inventors: Arnab Choudhury, Patrick Nardi, William Nicholas Labanok, Kelly P. Lofgreen
  • Publication number: 20170154828
    Abstract: A method and machine-readable medium including non-transitory program instructions that when executed by a processor cause the processor to perform a method including measuring at least one parameter of a substrate or a die; and establishing or modifying a thermal compression bonding recipe based on the at least one parameter, wherein the thermal compression bonding recipe is operable for thermal compression bonding of the die and the substrate. A thermal compression bonding tool including a pedestal operable to hold a substrate during a thermal compression bonding process and a bond head operable to engage a die, the tool including a controller machine readable instructions to process a substrate and a die combination, the instructions including an algorithm to implement or modify a thermal compression bonding process based on a parameter of a substrate or die.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 1, 2017
    Inventors: Timothy A. GOSSELIN, Patrick NARDI, Kartik SRINIVASAN, Amram EITAN, Ji Yong PARK, Christopher L. RUMER, George S. KOSTIEW
  • Patent number: 9418912
    Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a thermal interface material comprising a thermally conductive serpentine foil located between a first and a second interface material. The serpentine foil may be in a parallel position or a rotated position, in embodiments.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: August 16, 2016
    Assignee: Intel Corporation
    Inventors: Patrick Nardi, Kelly P. Lofgreen
  • Publication number: 20160095209
    Abstract: Techniques are disclosed for forming a package substrate with integrated stiffener. A panel of package substrates are provided. An adhesion layer is then formed on each package substrate of the panel of package substrates. A panel of stiffeners are then attached to the panel of package substrates by the adhesion layer, each stiffener corresponding to a respective package substrate. The panel of package substrates is then singulated into individual package substrates with integrated stiffeners. The stiffeners on the singulated package substrates include tabs that extend to the edges of the package substrates.
    Type: Application
    Filed: September 26, 2014
    Publication date: March 31, 2016
    Inventors: Robert STARKSTON, John GUZEK, Patrick NARDI, Keith JONES, Javier SOTO GONZALEZ
  • Publication number: 20160079141
    Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a thermal interface material comprising a thermally conductive serpentine foil located between a first and a second interface material. The serpentine foil may be in a parallel position or a rotated position, in embodiments.
    Type: Application
    Filed: November 25, 2015
    Publication date: March 17, 2016
    Applicant: Intel Corporation
    Inventors: Patrick Nardi, Kelly P. Lofgreen
  • Publication number: 20160005672
    Abstract: Some embodiments relate to an electronic package. The electronic package includes a substrate and a die attached to the substrate. The electronic package further includes an underfill positioned between the die and the substrate due to capillary action. A support surrounds the die. The support provides the same beneficial fillet geometry on all die edges. Therefore, the support provides similar stress reduction on all die edges. Other embodiments relate to method of fabricating an electronic package. The method includes attaching a die to a substrate and inserting an underfill between the die and the substrate using capillary action. The method further includes placing a support around the die such that the support surrounds the die.
    Type: Application
    Filed: July 3, 2014
    Publication date: January 7, 2016
    Inventors: Manish Dubey, Rajendra C. Dias, Patrick Nardi, David Woodhams
  • Patent number: 9230877
    Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a thermal interface material comprising a thermally conductive serpentine foil located between a first and a second interface material. The serpentine foil may be in a parallel position or a rotated position, in embodiments.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: January 5, 2016
    Assignee: Intel Corporation
    Inventors: Patrick Nardi, Kelly P. Lofgreen
  • Publication number: 20150151805
    Abstract: A device and method for temporarily mounting and displaying a flexible tag bearing a racing number onto a bicycle. The device includes (a) a fastener configured and arranged for releasable attachment to a bicycle, (b) an arm having a length and pivotably attached to the fastener for pivoting within a plane parallel to the sagittal plane of a bicycle when the bracket is attached to a bicycle as between a storage position and a display position, and (c) a mechanism for releasably securing a racing number tag to the arm such as (i) a plurality of orifices spaced along the length of the arm, or (ii) a retention clip on the arm.
    Type: Application
    Filed: February 4, 2015
    Publication date: June 4, 2015
    Inventor: Patrick Nardi
  • Publication number: 20140177166
    Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a thermal interface material comprising a thermally conductive serpentine foil located between a first and a second interface material. The serpentine foil may be in a parallel position or a rotated position, in embodiments.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Inventors: Patrick Nardi, Kelly P. Lofgreen