Patents by Inventor Patrick O'Neil

Patrick O'Neil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260025197
    Abstract: Methods, systems, and apparatus, for enhanced clock frequency control. In some implementations, a clock system tracks time using a clock signal having a clock frequency. An interface receives a time reference from a reference clock, and a feedback loop synchronizes the clock system with the reference clock. The feedback loop includes a feedback loop controller configured to determine a clock frequency adjustment for the clock system based on an offset between the time reference and a time indicated by the clock system. The feedback loop also includes a smoothing filter configured to alter the clock frequency adjustment determined using the feedback loop controller. The feedback loop updates the clock frequency of the clock system based on the altered clock frequency adjustment.
    Type: Application
    Filed: September 25, 2025
    Publication date: January 22, 2026
    Inventors: Nimesh Ambeskar, Patrick O'Neil
  • Patent number: 12463739
    Abstract: A redundant architecture for a Precision Time Protocol (PTP) network includes a plurality of PTP grandmaster clocks that provide first timing messages to a plurality of PTP aware switches based on a timing reference. The PTP aware switches determine respective first timing offsets based on the timing messages received from a primary grandmaster clock and provide second timing messages to an end node of the network based on the first timing offsets. The end node determines a second timing offset for the end node based on the second timing messages received from a primary PTP aware switch and adjusts its clock based on the second timing offset. When a failure of the primary grandmaster clock and/or the primary PTP aware switch is detected, a different grandmaster clock and/or a different PTP aware switch is designated as the primary grandmaster clock and the primary PTP aware switch, respectively.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: November 4, 2025
    Assignee: HUGH NETWORKS SYSTEMS, LLC
    Inventors: Nimesh Ambeskar, Patrick O'Neil, Jayant Ramakrishnan, Varsha Gorrepati, Sanhita Joshi
  • Patent number: 12457034
    Abstract: Methods, systems, and apparatus, for enhanced clock frequency control. In some implementations, a clock system tracks time using a clock signal having a clock frequency. An interface receives a time reference from a reference clock, and a feedback loop synchronizes the clock system with the reference clock. The feedback loop includes a feedback loop controller configured to determine a clock frequency adjustment for the clock system based on an offset between the time reference and a time indicated by the clock system. The feedback loop also includes a smoothing filter configured to alter the clock frequency adjustment determined using the feedback loop controller. The feedback loop updates the clock frequency of the clock system based on the altered clock frequency adjustment.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: October 28, 2025
    Assignee: Hughes Network Systems, LLC
    Inventors: Nimesh Ambeskar, Patrick O'Neil
  • Patent number: 12439351
    Abstract: Communication systems and methods are disclosed herein. In an embodiment, a communication system includes a grandmaster clock and a modem unit. The grandmaster clock is configured to output a primary clock reference based on a received signal. The modem unit is configured for communication with a remote terminal. The modem unit includes a network clock configured to be tuned based on the primary clock reference. The network clock is further configured to output a first signal to be used for a time reference for communications with the remote terminal. The modern unit also includes a master clock configured to be tuned based on the primary clock reference. The master clock is further configured to output a second signal to be used for a frequency reference for communications with the remote terminal.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: October 7, 2025
    Assignee: Hughes Network Systems, LLC
    Inventors: Nimesh Ambeskar, Jack Lundstedt, Yogesh Sethi, Patrick O'Neil, Tyler Horwat
  • Publication number: 20240364417
    Abstract: Methods, systems, and apparatus, for enhanced clock frequency control. In some implementations, a clock system tracks time using a clock signal having a clock frequency. An interface receives a time reference from a reference clock, and a feedback loop synchronizes the clock system with the reference clock. The feedback loop includes a feedback loop controller configured to determine a clock frequency adjustment for the clock system based on an offset between the time reference and a time indicated by the clock system. The feedback loop also includes a smoothing filter configured to alter the clock frequency adjustment determined using the feedback loop controller. The feedback loop updates the clock frequency of the clock system based on the altered clock frequency adjustment.
    Type: Application
    Filed: April 28, 2023
    Publication date: October 31, 2024
    Inventors: Nimesh Ambeskar, Patrick O'Neil
  • Publication number: 20240291580
    Abstract: A redundant architecture for a Precision Time Protocol (PTP) network includes a plurality of PTP grandmaster clocks that provide first timing messages to a plurality of PTP aware switches based on a timing reference. The PTP aware switches determine respective first timing offsets based on the timing messages received from a primary grandmaster clock and provide second timing messages to an end node of the network based on the first timing offsets. The end node determines a second timing offset for the end node based on the second timing messages received from a primary PTP aware switch and adjusts its clock based on the second timing offset. When a failure of the primary grandmaster clock and/or the primary PTP aware switch is detected, a different grandmaster clock and/or a different PTP aware switch is designated as the primary grandmaster clock and the primary PTP aware switch, respectively.
    Type: Application
    Filed: February 23, 2023
    Publication date: August 29, 2024
    Applicant: HUGHES NETWORK SYSTEMS, LLC
    Inventors: Nimesh AMBESKAR, Patrick O'NEIL, Jayant RAMAKRISHNAN, Varsha GORREPATI, Sanhita JOSHI
  • Publication number: 20230370984
    Abstract: Communication systems and methods are disclosed herein. In an embodiment, a communication system includes a grandmaster clock and a modem unit. The grandmaster clock is configured to output a primary clock reference based on a received signal. The modem unit is configured for communication with a remote terminal. The modem unit includes a network clock configured to be tuned based on the primary clock reference. The network clock is further configured to output a first signal to be used for a time reference for communications with the remote terminal. The modern unit also includes a master clock configured to be tuned based on the primary clock reference. The master clock is further configured to output a second signal to be used for a frequency reference for communications with the remote terminal.
    Type: Application
    Filed: May 11, 2022
    Publication date: November 16, 2023
    Inventors: Nimesh AMBESKAR, Jack LUNDSTEDT, Yogesh SETHI, Patrick O'NEIL, Tyler HORWAT
  • Patent number: 11436172
    Abstract: Disclosed herein is a system including a network interface arranged to receive a data frame from one or more communication networks. A frame filter is arranged to receive the data frame from the network interface, wherein the frame filter selectively outputs the data frame to at least one of a second network interface or a direct memory access (DMA) controller based on a data frame type. The DMA controller is arranged to store a received data frame to shared memory and transmit an interrupt signal to a media access control (MAC) driver after the received data frame is stored in the shared memory so that the MAC driver can initiate an interrupt handler in response to the interrupt signal to retrieve the stored data frame.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: September 6, 2022
    Assignee: Hughes Network Systems, LLC
    Inventors: Dan Hantz, Nimesh Ambeskar, Yogesh Sethi, Vivek Gupta, Patrick O'Neil
  • Publication number: 20220083485
    Abstract: Disclosed herein is a system including a network interface arranged to receive a data frame from one or more communication networks. A frame filter is arranged to receive the data frame from the network interface, wherein the frame filter selectively outputs the data frame to at least one of a second network interface or a direct memory access (DMA) controller based on a data frame type. The DMA controller is arranged to store a received data frame to shared memory and transmit an interrupt signal to a media access control (MAC) driver after the received data frame is stored in the shared memory so that the MAC driver can initiate an interrupt handler in response to the interrupt signal to retrieve the stored data frame.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 17, 2022
    Inventors: Dan Hantz, Nimesh Ambeskar, Yogesh Sethi, Vivek Gupta, Patrick O'Neil
  • Publication number: 20060036690
    Abstract: The invention includes an anti-spam Protection Device installed on the same network as email servers that it protects, or on a separate network that is connected to the networks of protected email servers. Inbound email connections route to the Protection Device, which evaluates each sending server by employing information from server attribute databases and other sources. The method uses a hierarchical score tree, which is comprised of nodes in a dependent, hierarchical structure. Each node features a score condition triggered by server attribute information, and a score that contributes to the blocking score. A connection evaluated to a blocking score above a threshold is terminated; otherwise the sending server is allowed to deliver the email message through the Protection Device. The Protection Device optionally allows the use of white lists or black lists to allow or deny certain sending email servers.
    Type: Application
    Filed: July 12, 2004
    Publication date: February 16, 2006
    Inventor: Patrick O'Neil
  • Publication number: 20050027743
    Abstract: A technique for representing the structure of hierarchically-organized data in a non-hierarchical data structure, such as a relation. The hierarchically-organized data is represented as a tree, and each node in the tree is assigned a position identifier that represents both the depth level of the node within the hierarchy, and its ancestor/descendant relationship to other nodes. The data represented by each node, as well as its position identifier, is stored in a row of a relational database, thereby capturing the hierarchical structure of the data in such relational database. A technique is provided for the compressed storage of position identifiers in a format that allows an efficient bytewise comparison of position identifiers to determine relative order and ancestry.
    Type: Application
    Filed: August 24, 2004
    Publication date: February 3, 2005
    Applicant: Microsoft Corporation
    Inventors: Patrick O'Neil, Elizabeth O'Neil, Shankar Pal, Gideon Schaller, Istvan Cseri, Jose Blakeley, Nigel Westbury, Sameet Agarwal, F. Terek
  • Publication number: 20050027728
    Abstract: A technique for representing the structure of hierarchically-organized data in a non-hierarchical data structure, such as a relation. The hierarchically-organized data is represented as a tree, and each node in the tree is assigned a position identifier that represents both the depth level of the node within the hierarchy, and its ancestor/descendant relationship to other nodes. The data represented by each node, as well as its position identifier, is stored in a row of a relational database, thereby capturing the hierarchical structure of the data in such relational database. A technique is provided for the compressed storage of position identifiers in a format that allows an efficient bytewise comparison of position identifiers to determine relative order and ancestry.
    Type: Application
    Filed: August 24, 2004
    Publication date: February 3, 2005
    Applicant: Microsoft Corporation
    Inventors: Patrick O'Neil, Elizabeth O'Neil, Shankar Pal, Gideon Schaller, Istvan Cseri, Jose Blakeley, Nigel Westbury, Sameet Agarwal, F. Terek
  • Publication number: 20050021549
    Abstract: A technique for representing the structure of hierarchically-organized data in a non-hierarchical data structure, such as a relation. The hierarchically-organized data is represented as a tree, and each node in the tree is assigned a position identifier that represents both the depth level of the node within the hierarchy, and its ancestor/descendant relationship to other nodes. The data represented by each node, as well as its position identifier, is stored in a row of a relational database, thereby capturing the hierarchical structure of the data in such relational database. A technique is provided for the compressed storage of position identifiers in a format that allows an efficient bytewise comparison of position identifiers to determine relative order and ancestry.
    Type: Application
    Filed: August 24, 2004
    Publication date: January 27, 2005
    Applicant: Microsoft Corporation
    Inventors: Patrick O'Neil, Elizabeth O'Neil, Shankar Pal, Gideon Schaller, Istvan Cseri, Jose Blakeley, Nigel Westbury, Sameet Agarwal, F. Terek